Help a failing memory? 80's IC prototyping service.

Jun 08, 2012 5 Replies

My usual substitute for a failing memory is google, but that has failed me, too. This is the kind of thing that will gnaw away at me to the point where I start shopping for Alzheimer's wards, so any pointers would be appreciated



One recent post reminded me of when we hired a fresh out Stanford grad (but a surprisingly good engineer instead of just a mangler-in- waiting). In school he had been used to using a rapid prototyping service, either hosted at Stanford or popular with the students. It promised quick turnaround even if the layout was suboptimal. Multiple people's circuits would be fabbed at once. I even think it was called Mosaic. Does this ring a bell with anyone?


Mosis?

John Larkin Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser drivers and controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation

MOSIS does MPW (multi-project wafer) runs, requiring a full mask set provided by the designer, which may be what spamtrap1888 is trying to extract from memory.

Or he may be thinking of Hans Camenzind's Interdesign operation which had pre-made silicon wafers, requiring only a metalization pattern to customize the connections.

Ferranti (GEC Plessey) bought that operation and I don't know if it exists anymore. ...Jim Thompson

| James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.

Yes!

Thank you so much.

But, they are not cheap. You have a choice of a dozen or more processes, but the minimum chip will cost $10K in old processes, and way more in newer ones.

Still, if you need a prototype IC, there isn't a much better way to go. It is run out of USC Marina Del Rey, not Stanford.

Jon

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Sadly, less expensive FAST direct write e-beam is almost here, which means economic times have killed it again. A few years ago, worked at a company developing direct write. They had the 'paper' design, system design, to move wafers almost as fast as mask processing, but direct wirte. The un-named Asian firm was paying them to do the development [not nearly enough to cover costs] and even when the machines cost $100M a piece,they promised to order 100 upon demonstration!

Anyway, direct write solves the problem of paying huge dollars for a mask. I believe it's really slow, but you only need a few wafers to test the chip, right?

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