Fujitsu microcontroller (8-Bit) Clock Modes Problems

perhaps you are misusing the symbol, maybe it should be used something like this:

PLLC_MPEN = 1; while(!(PLLC_MPEN & (1

Hi,

bad news, PLLC_MPRDY is equal to 0, so the bit won=B4t be shiffted. So I =B4m already at the first position... At the first position (of the Byte) is another bit that is already set...The Condition is already true....

I will check the symbol list....

Chris

What are PLLC_MPEN and PLLC_MPRDY? Did you define them, or are they part of the SDK?

From how you have used them, I'm guessing that they're individual bits within the registers, implemented as macros which expand to bitfields in a structure located at a specific address, e.g.:

struct pllc { unsigned sprdy : 1; unsigned spmc : 2; unsigned spen : 1; unsigned mprdy : 1; unsigned mpmc : 2; unsigned mpen : 1; } *pllc_reg = (struct pllc *) 0x0006;

#define PLLC_MPEN (pllc_reg->mpen) #define PLLC_MPRDY (pllc_reg->mprdy)

OTOH, if they are just bitmasks, then you are using them wrong; you would need e.g.:

#define PLLC (*(volatile unsigned char *)0x0006) #define PLLC_MPEN 0x80 #define PLLC_MPRDY 0x10

PLLC |= PLLC_MPEN; while (!(PLLC & PLLC_MPRDY)) ;

If you have enabled optimisations, the compiler will need the underlying variable to have been labelled as "volatile", as its value will change even when the CPU is in a busy-wait loop.

It sounds as if you might not be using the macros correctly. How about posting their definitions?

Possibly you need to use a symbol other than PLLC_MPEN in the second line. you may have to go to the datasheet for the processor to find out what the name of the register that holds the apropriate bit is called.

ily

ng

Hi,

Thank you for the answers :-) The microcontroller, which I=B4m working with, is the Fujitsu MB95F168.

@Jasen: you are right, the MPEN symbol should not be used in the second line: I found an application note with following code example:

MPEN =3D 1; while(IO_PLLC.bit.MPRDY =3D=3D0) {;}

Sounds similar to the code I wrote...

@Nobody: The optimizations are deactivated. You are right, the individual bits within the registers, are implemented as macros which expand to bitfields in a structure located at a specific address. I also posted the IO-Definitions. (they were given from manufacturer.)

typedef union{ /* PLL */ IO_BYTE byte; struct{ #if defined(__BITFIELD_ORDER_MSB__) IO_BYTE _MPEN :1; IO_BYTE _MPCM1 :1; IO_BYTE _MPCM0 :1; IO_BYTE _MPRDY :1; IO_BYTE _SPEN :1; IO_BYTE _SPMC1 :1; IO_BYTE _SPMC0 :1; IO_BYTE _SPRDY :1; #else IO_BYTE _SPRDY :1; IO_BYTE _SPMC0 :1; IO_BYTE _SPMC1 :1; IO_BYTE _SPEN :1; IO_BYTE _MPRDY :1; IO_BYTE _MPCM0 :1; IO_BYTE _MPCM1 :1; IO_BYTE _MPEN :1; #endif }bit; struct{ #if defined(__BITFIELD_ORDER_MSB__) IO_BYTE :1; IO_BYTE _MPCM :2; IO_BYTE :2; IO_BYTE _SPMC :2; #else IO_BYTE :1; IO_BYTE _SPMC :2; IO_BYTE :2; IO_BYTE _MPCM :2; #endif }bitc; }PLLCSTR;

__IO_EXTERN __io PLLCSTR _pllc; /* PLL */ #define PLLC _pllc.byte #define PLLC_SPRDY _pllc.bit._SPRDY #define PLLC_SPMC0 _pllc.bit._SPMC0 #define PLLC_SPMC1 _pllc.bit._SPMC1 #define PLLC_SPEN _pllc.bit._SPEN #define PLLC_MPRDY _pllc.bit._MPRDY #define PLLC_MPCM0 _pllc.bit._MPCM0 #define PLLC_MPCM1 _pllc.bit._MPCM1 #define PLLC_MPEN _pllc.bit._MPEN #define PLLC_SPMC _pllc.bitc._SPMC #define PLLC_MPCM _pllc.bitc._MPCM

I thought that I could use the PLLC_MPRDY to check if the MAIN-PLL Clock has been stabilized or not... Even if I use _pllc.bit._MPRDY, as suggest in the example, I don=B4t have the right value from memory...

The complete IO-Map Header File can be downloaded here:

Thanks for the answers !

Chris

From my reading of the data sheet and the above, I would have thought that too.

So you're saying that PLLC_MPRDY (or _pllc.bit._MPRDY) doesn't match:

Does "(int)&_pllc == 6" hold?

Does creating your own PLLCSTR instances behave as expected, e.g.:

PLLCSTR my_pllc; my_pllc.byte = 0; my_pllc.bit._MPRDY = 1; printf("0x%02x", (unsigned int) my_pllc.byte); ?

Does testing _pllc.byte rather than an explicit memory location work?