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=A0 =A0 =A0...Jim Thompson
ge.
afaik the xilinx DLL is basically just string of buffers each with something like 100ps of delay you can tap at different points
it might loose lock and need a reset to relock if you heat it that much, but why should it stop working?
-Lasse
I don't know, Lasse. Maybe leakage affects their operation, but that's just a guess. If you use parts way outside their specs and in small quantities, manufacturers tend not to be interested in such questions.
Cheers
I'm just looking at MiM caps for a 100MHz fixed frequency oscillator (with initial electronic trim, 4-bits, to account for basic process tolerance), TC=33u, so 0.5% increase from 27° to 180°.
So my guess, if you're having problems, is that it is the CMOS itself... CMOS slo-o-o-ows down at high temperatures.
I did some DLL stuff for Silicon Graphics, Chippewa Falls, WI, wa-a-a-ay back ~1996. Synchronizing 4 separate chips to a master clock. It was rated to 200°C.
Is your FPGA designed to be a DLL? ...Jim Thompson
Aha! I had forgotten the tapped buffer delay-line approach. That fails at very hot... can't meet minimum delay... if you're pushing it. ...Jim Thompson
You mean you've tried on-chip PLLs and DLLs. Perhaps a roll-your-own PLL feeding the FPGA would work.
=A0 =A0 =A0 =A0...Jim Thompson
d eLL
if the FPGA gets dog slow at those temps, really isn't much use for fast a clock anyway
-Lasse
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