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Fastest counter?

Depends if you're counting the number of cycles in one second, or the elapsed time per input cycle.

If you're counting cycles per second, there's no way to get better resolution that 1 part in 5000, no matter how fast your counter counts. There's always going to be a plus or minus one count error per second.

If you instead time each cycle, you can do much better, especially at lower frequencies.

5000 Hz is 200 microseconds per cycle. Your 10MHz counter will count up to around 2000 in one cycle, so your resolution is 0.05%. If you count multiple cycles, say TEN, then that takes only 2 milliseconds and your resolution is 0.005%.

If you count the output of the 1/256 divider, your counter will be up around 500,000, so the resolution is 256 times better.

Guess you should decide whether you want to count cycles per second, or seconds per cycle. At lower frequemcies, the latter has better resolution, at higher ones, the former.

Reply to
Ancient_Hacker
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Sure. It is rated as such. It should be fast enough as a prescaler for an FPGA. For even faster clockrates, there is the MC12095 doing div_2 and div_4 at 2.5GHz, or the NBGS53 doing div_2 at 10GHz.

Rene

Reply to
Rene Tschaggelar

How good is the signal to noise on your wave?

I assume you plan to start your counter on the positive zero crossing of your wave (or some other point), and stop it on the next positive zero crossing. I can't be bothered to do the maths now, but it wont take much noise to cause a significant error if you are hoping to get better than 0.05% resolution.

Gareth

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Gareth

You could design it to clear the prescaler counter before the counting interval, and then after that, bit-bang out a substitue clock and detect at what count the prescaler overflowed.

Mark Zenier snipped-for-privacy@eskimo.com Googleproofaddress(account:mzenier provider:eskimo domain:com)

Reply to
Mark Zenier

There's also the third option of a PLL multiplier at low frequencies.

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Reply to
Don Lancaster

Recently I looked at using a small Altera MAX3000A series CPLD (I think it was an EPM3064A) for high-speed counting. I fit a fairly wide counter with some fancy enables (to sync with a reference clock) plus a serial shift register (to read the output with a microcontroller) with an Fmax of just over 200MHz.

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Ben Jackson

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