Fastest counter?

And the problem with prescaling your input is...?

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I'm measuring the period of another wave by counting how many cycles of a 10 MHz oscillator occur during one cycle of the measured wave. 10 MHz doesn't quite give me the desired resolution for sufficient accuracy in my application.

Don

You could easily count at > 100MHz in a CPLD or FPGA depending on how many bits in the counter. The parts are pretty cheap and the development tools are free.

Rob

Hello Don,

Then that only leaves the solution Rob hinted: Use an external device, FPGA, fast counter plus serial readout, whatever. You could also take a look at ARM processors with higher clock speeds and at DSP. Some might offer timers that can be clocked higher.

But are you sure your clock oscillator is up to snuff WRT to your precision goals? To maintain a 10MHz clock to within 1 Hertz for any length of time is no small feat. Think about big, oven-stabilized, no vehicle traffic, no sneezing within 100ft and so on. You'd almost have to lock that to WWV and even then short term propagation jitters can throw you a curve.

Even if it's a Doppler application some of the above still applies.

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I've been getting good results from a little OCXO. I think it's good to about 0.5 ppb or so. Thanks for the advice.

Don

How about trying Don's idea: Put a 1/256 divider on your input. Assuming you have 256 cycles available, your measurement error goes down by 256 times.

Hello Don,

Those are nice. But their tolerances are typically much higher than that. For example the Connor-Winfield Stratum 3 series (IIRC around $100 a pop) are over 4ppm in max tolerance. Aging alone can be 30ppb, per day.

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I'd be surprised if the external counter input(s) on micros such as the PIC24H (made in 0.25u process) wouldn't count at >>100MHz typically. Older parts such as the 18F4550 will count at 50MHz guaranteed over temperature.

Best regards, Spehro Pefhany

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Ancient_Hacker wrote: How about trying Don's idea: Put a 1/256 divider on your input.

I guess I don't understand what you guys mean. If my measured signal is, say, 5000 Hz and I divide it by 256 then I get 19 plus a remainder. Wouldn't that round-off error destroy my accuracy, or maybe I'm not understanding what you propose?

Don

I get 50mhz out of an ordinary PIC16F870. Just totally replace the

82C54. Probably cheaper too.

Luhan

Hello Don,

There is another trick if you still have a few port pins available: Get two fast four-bit counters, a fast four-bit or wider latch and a really, really good OCXO for 160MHz (that one is going to set you back a pretty penny). Use one counter to divide the 160MHz by 16 and feed that to the uC, or whatever clock it needs, but this must be synchronous to the clock of the 2nd counter.

Use the other counter and latch its value every time the timer finishes. Run the timer input off the tail which will be 10MHz pulses. Read in the latched values through four port pins. Those will now be your new least significant bits. If you are hard pressed for port pins you could serialize that.

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Hello Don,

He meant measuring it 256 times in a row and calculate the average from those 256 runs. Doesn't work for non-repetitive events though.

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http://www.analogconsultants.com

My colleague just got done making a counter with 2.5 ns resolution using a Spartan 3 FPGA.

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Mark

Oh, I see. The problem is that the reason I picked this method in the first place is because I can get a fast reading. Otherwise I would be frequency-counting. I currently measure over 200 different waves by polling them all over and over and it takes about one or two seconds per pass. I can't wait a long time for each measurment since I'm constantly making adjustments based on this feedback.

Don

I used an FPGA to build a 28bit synchroneous counter running at 120MHz. Then I also have an MC100EP016A, a synchroneous

8 bit counter doing 1300MHz

Rene

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Hello Rene,

Now we're talkin'...

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Regards, Joerg

http://www.analogconsultants.com

And you can string them together to get a synchronous counter of essentially unlimited width capable of at least 500MHz - I could get that out of the MC100E016.

Putting proper 50R to -2V terminations on every single-ended counter output can introduce enough noise on the power rails to prevent the counter working at ful speed.

Higher resistance terminating resistors don't damp transmission lines nearly as fast, but if you can afford to waiit for a few nanoseconds after stoppping counting, the outputs will have time to settle.

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Bill Sloman

Just take something like the 74VHC163 a 4-bit 180MHz counter and use the terminal count to ripple clock your 10MHz 82xx thing. At 100MHz, the

82xx only sees 100/16=6.25MHz. You don't need every little stage to have 100MHz capability. There might be the slightest little challenge of stretching the high speed terminal count to satisfy the minimum clock width requirements of the 82xx- but that's what engineers are for.

Try

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James T. White