[....]
I can see some problems:
If either input is zero Hz, the circuit won't work.
To tell which is the higher by 1% at 6.5MHz you need a 650MHz clock. If the frequencies are allowed to go to low values, you need a lot of bits in this fast counter.
-- -- kensmith@rahul.net forging knowledge
In article , Joerg wrote: [....]
Like this:
*** input section ***Clock 1 ----!!---+--->!---+-----+---- A ! ! ! --- --- -!N-JFET ^ --- !!---+-----+---- B ! ! ! --- --- -!N-JFET ^ --- !-----+--- B---!/
*** X driver ***! \\ / \\ A---!-\\ ! P-JFET ! >---+ !--- GND 2V---!+/ +--/\\/\\-+---
In article , Winfield Hill wrote: [...]
How about: Combine the two clock signals with an XOR adn use the result to clock a switched capacitor filter. That way the filter of the F-V can adapt to the running frequency.
-- -- kensmith@rahul.net forging knowledge
--- Please bottom post.
If missing zero pulses is the only option, then there is no solution short of regenerating the pulse missed while counting. I'll explain: Let's say, for instance, that you have a device running with one input at 1Hz and the other at 10Hz with the 10Hz pulses "passing through". Now let's say that the 1Hz input abruptly goes to 100Hz. It'll take at least one 100Hz period for the machine to decide that 100Hz is faster than 10Hz and to turn the switch around to let the _rest_ of the 100 Hz pulses through, having "used up" the first one in the measurement process.
If all you're doing is counting pulses it would be easy enough to generate another one and stuff it into the pulse stream, but if you're using the pulses as clocks that might not be a good solution.
I noticed from one of your other posts that you said you're sending your switched pulses to a PIC. Can you elaborate on that a little and also tell us some more about the input pulses? That is, are they square (50% duty cycle)? Fixed width or does the width vary with frequency? Does the PIC care about the width of the pulses? Also, is the low frequency _really_ DC? If not, what's the lowest _differential_ frequency between the two inputs?
Finally, if you can tell us more about your application we might be able to come up with an easy viable solution for you.
-- John Fields Professional Circuit Designer
But you don't necessarily have to miss any pulses while deciding which is faster...because the first time you get two pulses on one line between two pulses on the other, you know instantly which is faster, and until then, the number of pulses on each line is the same.
I'm a bit rusty with cobbling JKs, but I can easily believe that this is possible with 2 or 3 of them and a gate or two. If I have a bit of spare time on the weekend I might have a whack at it.
Cheers,
Phil Hobbs
Here's a quasi-analog solution Differentiate each signal, clip off the negative excursion of one, the positive of the other, feed the pos and neg spikes thru two resistors to a middlin size capacitor. Then use a voltage comparator, referred to ground. The output of the comparator tells you which frequyency is higher (roughly). It's probably difficult to get better than 1% accuracy with this method. Do you need absolutely correct answer?
Here's a digital solution:
Take an up-down counter, say 16 stages, and a 10Hz oscillator. Feed the 10Hz oscillator to the up/down terminal. On the up count, feed in F1, on the down-count, F2. If the counter underflows, F2 is higher. This will work up to 6,553 Hz.
-- True, but there are other ways to do zero Hz detect, one being to use the counter\'s overflow to signal a signal lower than the lowest anticipated input.
Hello John,
If only one input drops to zero that wouldn't be a problem. Its counter will peg and the other one still wins since it doesn't peg. If both drop to zero the counters will show equal results, a scenario that needs to be handled anyhow. The OP has to decide what to do in that case. In management speak that would have to be part of the functional requirement spec.
That's nice of you.
-- Regards, Joerg http://www.analogconsultants.com
Hello Win,
Ha, so I won? I'll split the prize with Ken who drew the schematics :-)
If Jim still wins, I am sure he'd fancy a nice bottle of Shiraz.
-- Regards, Joerg http://www.analogconsultants.com
Everyone is quite interested in the scenario, so imagine this. Your car is driving down the road at 20mph. For arguments sake lets say that this equates to roughly 200Hz. One front wheel may be spinning at
200Hz, but maybe the other one is worn a little more due to over inflation and is spinning at 201Hz. Not a problem if you are driving down to the store to get milk, but how about a cross country trip? How many extra times does that wheel turn? Now image making a sharp right hand turn. The inside wheel turns quite slowly, whereas the outside wheel turns much quicker. If this was repeated over and over the outside wheel would turn significantly more than the inside wheel. We are trying to come up with a data sampling system with many different sensors, all being sampled real-time by the sensors in the wheels. This is not for a car, but the idea is quite similar.The duty cycle of the pulse train can be whatever we make it. It is coming from a proximity sensor, and we will also be making the gear that it is sensing.
This is not necessarialy feasible because there is no guarantee that these do not run at exactly the same frequency. I only stated that they were different because the chance is quite remote. But anything is possible.
Perhaps I also overstepped my bounds a little saying that we could not miss a pulse. Missing a pulse would not be the end of the world, and it is looking more and more like it will be inevitable.
Normal operation would be anywhere from 0Hz to 1kHz, but we would be expected to operate up to 6.5kHz. This stops and starts, and you have no way of knowing if it will stop on a high or low pulse. Also if a sensor were to fail and give a steady +5V, we would still need to function off the other signal.
Phil Hobbs wrote:
There's no reason that this can't be done--the general scheme works fine if the two are phase-locked together, even. The only limit would be metastability if two edges arrive too close together, but that's the chance we all take in asynchronous systems.
Cheers,
Phil Hobbs
I prefer a Cab/Shiraz blend ;-)
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
More and more this is looking like an application for a little micro controller. You would need one with two or more timers, or use as many external timers along with it as you need. Now you can handle all kinds of exceptions via your code. Much easier to optimize than being out there at the test track with a solder iron and a box of parts.
A uC can run in capture mode where a timer inside measures the period length of a signal. It can also measure phase relationships and whatever else you want it to log. Within accuracy bounds, of course. IIRC you haven't given any accuracy specs but timers in a uC can typically run at the full clock speed of the uC if needed. With some nifty code tricks you can also extend the timer if the 16 bits or whatever the uC offers isn't long enough. An extra watchdog timer which is usually also part of the uC can be used to catch lock-up situations and log what preceded them.
If you go that route select a uC that can be field programmed from a laptop via a serial link, and where you have folks in house who already know its architecture.
-- Regards, Joerg http://www.analogconsultants.com
I built a robot like this once. It was just like a kid's bigwheel (or tricycle). Two trailing small wheels and one powered/steerable wheel on the front. I wanted to do odometry on the trailing wheels to track position. This turns out to be a lot harder than it seems because it's not just a matter of absolute counts (100+ on each side together is straight, while 100+ later followed by a matching 100+ is spinning in place mostly).
-- Ben Jackson AD7GD http://www.ben.com/
Ooops you're right, I misread his post. 6.5KHz makes it a lot easier to do.
-- -- kensmith@rahul.net forging knowledge
Jim Thompson wrote:>
Andy comments:
If you have two lines, the first line to have two pulses in a row on
it will be the higher frequency........... All the digital comparators are based on that principle... The OP can figure out what he wants to hook together to detect it.... If the frequencies are close, it may take a very long time, in the order of the reciprocal of the differenct frequency (depending on the initial phases).
But the absolute rule is : The highest frequency is the first to have two consecutive pulses on it....
Andy in Eureka, Texas
PS Two D's and a Nand gate will do it very well. ( Principles of Three State Phase Detection - EDN magazine author : Claude Andrew Sharpe )
No. Stolen from the "9-gate wonder", digital by Ron Treadway, with analog kibitzing by yours truly, built as the MC4044 phase detector.
Surfing I found such a thing but called a frequency comparator. They filtered the difference between UP and DN and applied to an LM311.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
You will know that by the time you get two pulses on one between the other, but it is likely to have actually become faster some time before that happened. My impression was that kind of detection lag (until it is "obvious") is not acceptable, but then we haven't been told details of the application.
Andy writes: The first digital freq/phase comparator I am aware of was in a Fairchild App note by Stinehalfter and Nichols " An Avionics Digital Frequency Synthesizer ".... If my memore serves correctly, that app note was out before the 4044 was produced, and was the basis of the frequency synthesizer used in the Bendix RT-241 Comm transceiver..... I used the 4044 about 2 years later in an ADF by Bendix.....
The problem with the 4044 was that it was very hard to understand the operation by looking at the 9 gates.... The D type in the article mentioned had exactly the same state transition map, but was much much much more "intuitive" ---- one could read the article and then actually understand the operation --- as well as what happens when inputs are different from the ones in the 4044 app note.... In fact, if one tried, one could actually "redraw" the 4044 and find that it was actually two D's and a reset gate. I did that AFTER I did the dual - D, just to see if they were equivalent.... but the dual D was not "stolen" . Rather , using the 4044 was a stepping stone to the generation of a different implementation. Later, I did the Quad-D, which was patented...... also an evolutionary step of the "9 gate wonder".... I really liked the 4044, but after I did the D type , i was able to build faster and faster equivalents, as well have have an intuitive understanding of the "dead zone" and the versions of the lock detector...One cannot get that "feel" from staring at the schematic of a 4044....... One CAN when looking at the Dual-D or Quad-D......
The 4044 wasn't the first, but , as far as I know, it was the first which was in a single package. The app notes on it were comprehensive and probably hundreds of synthesizers were built by designers who really didn't understand the operation, but knew how to use and apply it...... It was a stepping stone for me, and probably a thousand other synthesizer designers....... I put Ron Treadway right up there with Bob Widlar in their causing a step function in the technology......
Andy in Eureka, Texas
PS ( How long had you been out of school when you put that darlington in the 4044 as a charge pump ? Just curious )
The MC4044 dates to ~1965-66
Makes perfect sense to me ;-)
[snip] 3 years. Gold-doped process, no PNP's (yet).But it's used as if it were an OpAmp.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
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