Detecting down to 25mA-150mA on 0-20A line?

Simulation now corrected...

...Jim Thompson

Yes. The end-of-charge voltage set to 4.20V (or a multiple of that) and the constant current limit is set to whatever the max. current value I want to use for charging. The current drops as the cell charges.

Huh? In over my head because I wanted to find out if there was a better way to do this (than the ways I worked out on my own)?

I already have a CC/CV supply with V and A readouts. I want to end the charge when the current has dropped down to a particular level (25mA-150mA). Sitting there monitoring the display is not what I had in mind.

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LM324 might be a better move then. they can handle input down to 0.6V _below_ the negative supply. (so put the sense resistor in the negative circuit)

For some reason this quad op-amp is cheaper than the 741 at jaycar...

Bye. Jasen

In my OP I mentioned that when the current drops down to a certain point (variable, from 25mA to 150mA), I want to flip a bit.

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Ooohhh...I have the parts to play around with that circuit. Thanks!

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I was initially hesitant to use a sense resistor due to the playing around of the power supply voltage I'd have to do for every new cell (if the end-of-charge current was changing). But Jim's circuit has a nice linear drop across R1 for me to add to the power supply voltage so that the LiPo cell will get 4.20V at end of charge (i.e., a 100mA end-of-charge current needs 4.30V voltage at supply).

Time to play! Thank you everyone for your input and recommendations. I really appreciate the time you've taken to get me going in a direction that looks like it will work well for my new toy. :-)

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Jim Thompson's circuit and simulation certainly has some merits, but there are some caveats to be aware of.

In particular the circuit is most likely not stable, or at least very nearly unstable. There is a high probability that it may decide to burst into uncontrolled spontaneous and continuous oscillation under the expected circuit conditions.

The first problem is op-amp outputs in general don't like driving capacitive loads directly. Unless they are specifically designed for direct capacitive loading, you can't place more than a few tens of picofarads (or maybe a few hundred at the most) directly on the output without risking instability and spontaneous oscillation. A MOSFET such as an IRF3704 has a larger gate capacitance than this, perhaps around 2.5nF. This isn't a very well advertised "feature" of op-amps since it isn't exactly a flattering characteristic, but it should be briefly mentioned in some of the op-amp ap notes out there.

So how does one fix this? Well typically one would simply place a small resistor in series with the capacitor. 47 ohms or larger would typically work great for practically any size capacitance. So simply placing a 47 ohm resistor in series with the op-amp output of Jim Thompson's circuit should help this particular potential source of instability.

Unfortunately, it also leads us to the next potential source of instability.

The gain of the circuit is simply humongous (not that that is a real word). High gain isn't a friend of stability. As it is drawn the op-amp doesn't have any direct negative feedback, so it seems to me the op-amp is operating at it's maximum possible gain as if open loop. The op-amp is internally compensated and is supposed to be stable under these conditions, however, the IRF3704 MOSFET is also a part of the control loop, and it adds it's own gain to the control loop as well. The IRF3704 datasheet suggests it has a transconductance of 42 Siemens (minimum) at the specified test conditions of Vds=10V and Id=57A. I assume the Tran will be less at your expected operating conditions, but by exactly how much is uncertain since the datasheet graphs don't extend down into all of your expected regions of operation.

So in other words if I'm not mistaken, it appears to me the entire control loop gain is higher than the open loop gain of the op-amp itself. As far as I'm aware, this by itself is a no-no and all bets are off as for expectations for stability. Additionally it seems to me the op-amp adds it's own inherent built in pole to the control loop, but the 47 ohm+ resistor in series with the MOSFET gate capacitor makes another low pass filter and adds another pole to the control loop. Two poles=bad (unless counterbalanced by zeros or at frequencies that are not important) since this will push you up to your 180 degree phase shift limit. Note that the MOSFET gate+gate resistor pole probably occurs at quite high frequency, but given the uber huge gain of the circuit, it may not be sufficiently high frequency to be irrelevant.

So in other words, use the circuit as drawn at your own risk. It may work, it may work some of the time, it may work some of the time with some types of parts at some temperatures, but then again, it may instead break into spontaneous oscillation at certain operating points.

snip

isn't the circuit basically a standard voltage regulator, except the control has been inverted and the FET placed in parallel instead of series with the load, the 1Ohm resistor ?

-Lasse

And, testing your historical background, "And the horse may talk" ;-)

You may be right, you may be wrong... stability of such large-gate circuits IS difficult to predict.

However the 1 ohm sense resistor does help kill the loop gain.

Capacitive loading depends on a lot of parameters... but 2.5nF is so huge that, using the model included with PSpice, the simulated Phase Margin = 87°

However, since I trust no one but myself, when it comes to Spice modeling, I replaced the LM324 with my own modeling of an LM339, used a 9.1K pull-up resistor, and placed 0.33uF from gate-to-drain; then ran a pulse test.

The result is _nearly_ perfect, but I see some slew-rate hunting going on (about 4mV P-P sawtoothing), so it probably needs a zero in there somewhere.

But I think the basic concept is viable... maybe just back off and make a discrete low-gain diff-pair.

...Jim Thompson

Understood.

I was thinking in terms of charging current in the real world. Under actual circuit conditions the temperature may affect the current even if it is (was) at its end-of-charge value.

Does the bit flip back if the current rises above the set point? Does the bit control the charge voltage or just inform some other circuit that the battery is charged? Does it sit there and vacillate between on and off if it is at the threshold? Leave it to chance and chances are it will oscillate.

Yep. Fritz is just being picky... must have had a bad day ;-)

However I DID just throw that together as a conceptual machine, and I can see lots of ways to make it single pole with lower gain... tomorrow... right now it's almost sip-a-glass-of-wine time ;-)

...Jim Thompson

Capacitive load compensation added...

Happy now ?:-)

...Jim Thompson

there

Well you certainly deserve an "A" for effort...

But am I happy now? Well... Call me hard to please but I guess it would be a not too spectacularly enthusiastic happy. It appears to me the modifications should meet the OP's requirements without any major problems that I can see, but I guess it isn't quite the magic bullet solution I was hoping for.

Losing the tight regulation of the prior circuit is a real bummer, although I suppose not really important in the OP's application. Gaining the extra three resistors and the capacitor are not unreasonably troublesome, although the new schematic obscures the real added complexity since the 200mV voltage reference can no longer be some high impedance resistive divider off some other regulated voltage.

Hopefully you are more happy with your new circuit than I am, because someone should be happy with it. I'm reminded of the last fortune cookie fortune I got:

"Ideas are like children, there are none so great as your own." (just don't add the obligatory "in bed" words at the end like one would normally do with fortune cookie fortunes)

You answered your own question... it's not germane... it's only protection. So I purposely killed the loop gain so low I didn't need to spend any great effort compensating it.

Shirley you understand that you can make a divider from the OP's regulated supply that produces 0.2V with a 1K impednace ?:-)

It can be done with 2-3 small-signal transistors and 3-4 resistors but is even less tight.

You're so picky-assed you must be an ASU professor ?:-)

...Jim Thompson

You charge the battery from a voltage regulator; you probably do not want a diode or something like that in series with the battery.

However, it is possible to bypass your voltage regulator with a current source equal to your setpoint.

The moment that the output of the regulator rises to a level above normal, it is time to switch off.

This is easily measured on whatever compares the output voltage with the reference, or on the output transistor drive for that matter.

Do not forget to switch the current source off as well :)

Thomas

I don't know what that 200mV reference is about when the standard charge voltage tolerance for a LiPo is +/-50mV per 3.7V standard cell. So using a 50mV reference means he can set the power supply to 4.20V and forget it. With that 200mV reference he still has at least 150mV to go through that 1 ohm resistor. You may not need any compensation with an emitter follower with diode pulldown driving the gate- the output circuit feeding back to IN(+) has nearly zero time constant: View in a fixed-width font such as Courier.

. . 9V . .-------------------. . | | _ . | - /| Ibatt . | ||| . [2.2k] /|v| Iadj | . | - | . | | | . +----. | | . | | /| | | . --- | /+|-+-[R]---+------+ . / \\---+ +---< | | | . --- | | \\-|-. [0.3] | . | [2.7k] | \\| | | -|| . | | | |45mV | >||----. . | +--------------' | -|| | . | | | | | | . | [50] | | | | . | | | +------+ | . '----+ | | | . | | --- | . --- | /// | . /// | | . '-------------------------------' . . . R . Ibatt cutoff=150mA - Iadj*(1 + --- ) . 0.3 . . .

I agree. The end-of-charge current level is passed onto a PIC that latches the bit.

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Using National's LM324 model I was getting 67° of phase margin, but pulsing did show ringing, so I killed the loop gain and isolated Ciss.

...Jim Thompson

I was wrong. You're a young buck recent grad of the ASU playboy school of engineering, with virtually no real-world experience.

But you seem to have good family background! That MAY make up for the ASU experience ;-)

...Jim Thompson