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Don McKenzie
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Intelligent 2.83" AMOLED with touch screen for micros:
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The I/O pins can be in between state after a reset. The Intel datasheet says this happens if the capacitance on the pin is more than
20 pf, but I have seen this happen with chips that had little capacitive loading on the I/O. The I/O pin has a sort of latch function to hold the previous state of the output pin when the output is in "tri-state" mode, which it is after the reset. But after a reset the latch function is in the linear range and can get stuck in an in-between state.
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