On 2/14/2021 3:08 AM, Phil Hobbs wrote: > Artist wrote: >> On 2/10/2021 11:27 AM, Phil Hobbs wrote: >>> Artist wrote: >>>> I consider using the common centroid resistor array as shown in figure 14.1 in: >>>> >>>>
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>>>> >>>> to achieve resistor ratios of high stability. My concern is at what frequency crosstalk will be a significant effect. How high a bandwidth is possible? >>>> >>>> This would be for a TIA circuit of topology shown in Figure 9 on page: >>>> >>>>
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>>> >>> Resistor matching is a nit in that circuit. The base current of the bootstrap device causes some significant output offset (100-150 mV) anyway, and then there's the beta tempco of Q1 and Q2. (I usually put a diode-connected transistor in series with the upper resistor just to remove the tempco of Q1's V_BE, but that's a fine point.) >>> >>> You can replace Q2 with a CPH3910 JFET running at about 10 mA, which will be quieter anyway, and whose transconductance is slightly better than a BJT running at 300 uA. >>>> >>>> which must have a bandwidth of 40 MHz where the common centroid resistor array would be used for the 2 Mohm resistors in the figure. 40 MHz means I cannot use the same components as Figure 9, but I expect the topology will be useful. High DC output stability is desired. >>> >>> How high is high? >>> >>> Cheers >>> >>> Phil Hobbs >>> >> >> Thank you for your reply:) >> >> I have abandoned the idea of using a common centroid resistor array for this. >> >> I have seen the diode connected transistor in the version of this front end circuit you have in your book. For this I intend to use the same transistor used for Q1 just for the benefit of part commonality. >>
supply lines which are connected to the two 2 Mohm Rbias resistors (but not the op amp's power supply connections because these are not ohmic, and the noise reducing base to emitter feedback requires the load be ohmic). The positive supply would require a high gain NPN BJT that can go to 40 MHz. And the negative supply would require the same for a PNP. >> >> The higher the gain, the more the capacitance is multiplied. I am somewhat concerned because there is a relationship between bias current, and transistor gain. 2 Mohm, or similar, gives very little current. I had thoughts of and additional emitter to ground resistor just to get the bias current to where gain is optimum for the transistor. >> >> Any suggestions for transistors to use in this capacitance multiplying circuit to be used in a filter that must filter up to 40MHz? >> > > The bandwidth of the cap multiplier should be closer to 4 Hz than 40 MHz. It's just a glorified RC filter, after all. For NPNs, I like the 2SD2704K below 20 mA and the 2SD2114K from 20 to ~100 mA. > > For a PNP, you might check out the BC807-40. > > You want to put an RC lowpass in series with the collector as well, to prevent feedthrough due to C_CB and Early effect. > > Modern op amps tend to be disappointing in that circuit because all the HV ones with low input current have much higher input capacitance than the LF357, so they trip over their own big feet. I've tried quite a few, and they're very disappointing compared with that gizmo from 1975. > > I'm actually in the process of ditching that circuit for the third edition, in favour of a JFET bootstrap running at I_DSS, connected directly into a bipolar op amp. > > Cheers > > Phil Hobbs >
I do not mean the filter bandwidth of the capacitance multiplier as it filters out a regulator's output ripple, and other noise.
The bandwidth I am referring to is the multiplying transistor output's source impedance at 40 MHz, which has a bearing on ts ability to regulate a load that has 40 MHz signal on it, and how much multiplying it can do at 40 MHz. I suppose the higher the load frequency it must regulate, the less capacitance is needed.
Do you use capacitance multipliers on op amp power supply terminals also? If so do you give them their own capacitance multiplying filters? Or is it the on the same filter as the two 2 Mohm resistors in Figure 9 of:
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?