Audio Delay Circuit

Tape loop?

...Jim Thompson

-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |

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| 1962 | I love to cook with wine. Sometimes I even put it in the food.

Reply to
Jim Thompson
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So why waste people's time by not including that insight in your first post?

I estimate from the fact that you are a top poster, that you are somewhat oblivious to....

Reply to
Don Bowey

door spring ?

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Real Programmers Do things like this.
http://webpages.charter.net/jamie_5
Reply to
Jamie

Does anyone have a schematic of an audio delay circuit capable of taking the output of a radio and delaying it five seconds or so before passing it to the speakers?

Thanks,

George

Reply to
George

Yeah, I thought of that but was hoping for something solid state. Sorta like this device

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only do it yourself cheap.

George

Reply to
George

depends on the quality that you want

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martin

Reply to
martin griffith

Nope, he said "circuit", not wierd, still fashionable, analogue tape, I wuz an xpert 1nce onit. You just try and buy a 3 head deck, you are stuck. Then you have to get some tape.......Quantegy (ex ampex) are the only guys these day who do Real Tape

martin

Reply to
martin griffith

On Sun, 09 Oct 2005 17:11:00 +0000, George top-posted:

Well, "cheap" and "it works" are sometimes incompatible goals ;-) .

I once designed a little FIFO using an Intel 8748, which, depending on how much you wanted to spend on RAM, could be extended to be arbitrarily long. This was for a strip chart recorder that had a little different clock rate than the processor (80186) that controlled the unit. (4-channel remote heart rate monitor). At audio frequencies, all you'd need would be the ADC, the FIFO, and a DAC. The DAC part is almost trivial, and these days, ADCs are almost free. I'd have to do some study to give you any more definitive answer about the FIFO RAM, however.

Good Luck! Rich

Reply to
Rich Grise

Oblivious to what, exactly? ;-P

Cheers! Rich

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Cheers!
Rich
 ------
""I\'ve had one child. My husband wants to have another. I\'d like to watch him
have another.""
Reply to
Rich the Newsgroup Wacko

OK, here ya go:

[mic]---[PC sound card]---[FIFO S/W]---[PC sound card]---{speaker]

;-P

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Cheers!
Rich
 ------
 "Why is it that there are so many more horses\' asses than there are
  horses?"
  -- G. Gordon Liddy
Reply to
Rich the Newsgroup Wacko

For five seconds? How big is your back yard?

Find a radio or TV station that's upgrading, and snag one of _their_ five- (actually, I've heard that it's seven-) second delay units that they're retiring.

Good Luck! Rich

Reply to
Rich Grise

Hello, I'm attempting to design an audio delay circuit. While electronic engineering is not my specialty, I can solder like a mad man and I have a general idea of what's going on. I was wondering if anyone would be willing to help me along. The thing needs to have audio in (rca and 1/8" mini) and audio out. Adjustable delay from 0-12 seconds (more the better, but 15 would be over kill). .5 second steps would be fine, infinite would be better. Both battery and adapter powered would be nice. It should be small (walkman sized). On/off/bypass switch (of course) and it should be as cheap as possible (of course). I explained this to a guy I know in Ohio, he gave me this:

"If I understand what you're looking to do, this could be done with an ADC, some memory to act as a buffer, and back to analog via DAC. Not really all that complicated. Small pause on startup to fill the buffer. Use an encoder (or even a pot) to set the delay value in the PIC that would be shifting the data out of memory to the DAC. There might be an even easier approach using some analog circuit, but it would be pretty easy to do it via digital/analog converter ICs."

I understand the very basic theory behind most of that paragraph (and could figure out the rest.) The biggest conceptual problem I have with it is "some memory to act as a buffer." Thanks for your time.

-Mike.

Reply to
mikerbot

One of many 8051s with ADC and DAC plus an external RAM chip would do it to about 12 bits at perhaps 100KHz.

--
--
kensmith@rahul.net   forging knowledge
Reply to
Ken Smith

Assume your thingy is sampling at 44.1kHz, which is fairly standard. If you are using a 14 bit ADC, that means you need to store 14 * 44.1e3 * s bits, where s is the number of seconds you want to delay. Lets say you want 10 seconds. Then you need 6.174M bits. However, most of the ram chips you are likely to be able to use are byte addressable. Thus, you need 882k bytes to store the data. If it is stereo, you need twice that much, at least. At that speed, you might be able to get away with flash, but static ram would be easier to use.

If you don't care about the sound quality all that much, you can get away with a far smaller buffer. For example, if you restrict yourself to an 8 bit A/D converter, and save only 4k samples/sec, you only need 40.96k bytes to save 10 seconds. Thus, you could do it with 2 32k byte static ram chips.

Sadly, there are lots of other things to consider. Reading the data in using an A/D chip isn't too hard. However, you need to tell the chip to sample, then wait a bit until the sample is there, and then clock the data into the proper ram chip by setting the address input, enabling a write cycle, and waiting until the hold time is complete. You also need to be reading the data out at the same time. That means a memory read cycle, involving a different address after the write cycle, followed by an activation of a D/A converter. You also need to ensure that the A/D and ram chips don't try to write to the same wires simultaneously. Once the data is into the D/A converter, it is output as an analog voltage. That voltage will probably need to be buffered and filtered. The D/A may buffer it for you, but you'll have to make sure. Then, the filter will remove any strange artifacts associated with storing the data digitally, and present a signal to the output.

The device would be reading from one address, and writing to another address. The write address is N addresses 'ahead' of the read address, where N is related to the sample speed and length of delay. Using your pot idea, you need to somehow create these addresses. You could simplify this somewhat by using the same counter for the lower 8 bits of address, and switching the upper bits to be behind the write, modulo the memory size. That means getting the analog voltage output at the pot, converting that into some number representing the delay, subtracting that from the write address, and using the new number as the high bits of the address.

This isn't a project for a novice.

However, using a microcontroller would vastly simplify the design. For example, you could select a microcontroller with a 64k memory, and store the samples in that on-chip memory (assuming you went for the low quality option.) Most microcontrollers these days have at least an 8 bit A/D, so it could handle input as well. The output would have to be done with an external D/A converter or R2R ladder (a cheaper version using resistors), but you would need to buffer the output. Thus, the device could be as simple as a microcontroller, a little battery power supply, a D/A converter, a couple of opamps, and a bit of protection for the inputs and outputs. Even with external ram chips, it would be possible for the microcontroller to manage all of the interactions with ram, thus eliminating all of the sequencing logic required.

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Regards,
 Bob Monsen
Reply to
Bob Monsen

You could string together a pile of these guys:

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Then the task for the micro would be simple - a write pulse at one end at the sample rate, and a read pulse at the other end after your delay time.

I have no idea how expensive that would be - maybe somebody knows about a bigger and/or cheaper FIFO.

Good Luck! Rich

Reply to
Rich Grise

That's the way it was really done before cheap memory and microprocessors. What was it back then, 3.5 ips ??

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.
Reply to
Jim Thompson

at 2048x9, it would take a few of them to get 10 seconds. Also, how would he adjust the length of the delay? I guess he could change the sample time. However, then, playback quality would depend on the length of the delay. Perhaps not a bad trade-off.

I could build one of these using a big PIC for about $30. John Fields could probably do it for $5 with discrete logic.

Jim Thompson's tape loop sounds better and better, though. Tear apart two old tape recorders, feed the tape through at a known rate, record on one head, play back on the other. The delay is then proportional to the distance between the read and write head.

--
Regards,
 Bob Monsen

Cantorism (set theory) is a disease from which mathematics will have to 
recover.
- Henri Poincare
Reply to
Bob Monsen

Just by the timing of the read pulse - as soon as you write a byte, it becomes available at the output. And I'm fairly sure I've seen FIFOs with pins to cascade them. But it would take a lot of them, especially if you want more than 9 bits.

That wouldn't be too hard - I've even seen tape decks with three heads: erase, record, and play. Just pull the loop out between the record head and play head.

Cheers! Rich

Reply to
Rich Grise

This century? ;)

--- Regards, Bob Monsen

All things which can be known have number; for it is impossible for a thing to be conceived or known without number.

- Philolaus (Pythagorean)

Reply to
Bob Monsen

Sorry, never got round to doing a schematic for it but the dead simplest audio delay I've ever made centred on a CS4231 audio codec, an NEC 42280 265k*8 field buffer, an HC245 and a MCU (in my case, a 89C52) The MCU loads up the config registers of the codec then the codec and the memory talk to each other ad infinitum. The field buffer memories are particularly good for this app because you dont need to worry about the addressing - they just look like a big fifo. The 4231 can do everything from 16 bit 48k stereo down to 8 bit 8k mono depending on what you plonk in the config registers. Blurry pic at : homepages.kcbbs.gen.nz/moby/delay.jpg cheers M

Reply to
moby

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