pulse delay circuit

Jun 10, 2006 12 Replies

Hello to all, I'm in need of a simple delay circuit for the positive edge of a pulse of 12 VDC. I need to create a delayed version of about 20 uS and it must be realiable and within a couple of uS tolerance. I am planning to use the 74HC123 dual oneshot for the delay control but i'm not sure how best to translate 12 volts down to 5 and back up to 12 again at the output without any unrealiablities adding to the circuit. I'm guessing two tranny's and four resistors would be a bare minimum, but i'm not sure which transistors i need to use and how best to bias and supply voltage/current to them for the desired results. (12>5Vdc..20uS delay..5>12Vdc) Can anyone offer advice on this?



Thanks, Mark Kelepouris


"Mark Kelepouris" schreef in bericht news:448a9309$0$14243$ snipped-for-privacy@news.optusnet.com.au...

Mark,

Look for a CMOS dual monostable like the CD4098B. It handles voltages up to

20V, so 12V pulses (along with 12V power of course) will meet your requirements as far as the voltage concernes. You'll need the datasheet as the CD4098B is functionally compatible, but the pinout and the timing differ.

petrus bitbyter

Thanks petrus, I was kind of hoping there'd be a simpler solution, looking forward to getting hold of that chip. It seems unusually unlucky for me, that my 'Howard W. Sams & Company' cmos cookbook i have, has the 4097 as the last entry. After that, the 45xx come into play.

View in a fixed-width font such as Courier.

. . . . +12V . | . +5V | . | [1k] . .---------+-------------. | . | | | +---->

. [1k] +--------74HC123-------+ | . | | __| | __| |/ . >--| . | 20US | | PW | | . | DLY | | OUT | | . | | | | | . +--------+ +--------+ | . | | | . -----------------+-------------+---------------+---- . | . --- . /// .

To convert down the 12V input pulse, you just need a small resistor say 10K between the pulse source and the input of the 74HC123 chip. The input diode protection of the 74HC123 will clamp the voltage down. To reconvert the output of the monostable to 12V, you can use a transistor like 2N3904. A pullup resistor of 4k7 should be ok to keep the output rising edge sharp enough.

Tom

Do you want the delayed pulse\'s trailing edge to fall when the input pulse\'s does, or what?

Hello Mark,

The 4098 costs 48 cents in single qties at Digikey. The 4528 used to be popular but Digikey carries no stock. Then there is the 4538, in stock, but a few cents more.

Simpler solution? You could build something with two sections of a CD40106 but it won't be much simpler. RC delay with another resistor plus diode across the R if you want different delays for rising and falling edges. But now you'd rely in part on the threshold values for timing.

Regards, Joerg http://www.analogconsultants.com

Discrete solution. With better R values the R-S f/f can be two transistor. Add another if you want a pulse after a delay rater than just a delay.

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Timing should be consistent enough (with respect to R and C) without adjustments (as opposed to, say, CMOS threshold variation).

Tim

-- Deep Fryer: a very philosophical monk. Website:

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The pos. edge of my input pulse will trigger the first oneshot (which is fine tunable to give the desired delay) The neg. edge of this pulse will trigger the second oneshot, which will provide the 'new' delayed pulse. As you probably know, the 74HC123 can be configured to trigger on neg. or pos. edges. So the only problem is the voltage translation.

Mark

"Mark Kelepouris" schreef in bericht news:448aabe5$0$16946$ snipped-for-privacy@news.optusnet.com.au...

The datasheet can be found on the net easily. Google for "CD4098B datasheet". (Without the quotes of course). Farnell and Digikey sells them for about half a dollar. If you can't find the datasheet, I can sent you one.

If component count and space are not an issue, you can keep the 74HC123. See Fred Bloggs schematic. You will have to make a 5V supply (an 7805 and some capacitors). Also keep in mind that the simple transistor amplifier is not intended for very high speed.

petrus bitbyter

The 4538 will also work, but if you\'re looking for utter simplicity, why not try this, (View in Courier) | \\ | \\ IN>---[POT]O---O| >-->OUT | | / | / [C] | GND>----------+ where the inverters are 1/3 of a 40106?

I understand, but my question was whether you were concerned with the location of the trailing edge of the delayed pulse. Since you\'ll be using two one-shots, however, you can make it fall wherever you want.

Hi John, The 4538 worked to the book. I have it up and running. The trailing edge of the final pulse doesn't matter much, as long as the pulse is kept short. The only trailing edge that does of course, is in the delay section. Mark Kelepouris

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