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Audio delay circuit for digital audio (dolby 5.1 toslink or digital Jack)

I have need for an audio delay line that could take a dolby 5.1 optical (Toslink or rca digital out) about 200khz signal and delay the signal a frame or two to keep the lip sync with the Video.

When the digital audio output of my Dish HDTV receiver is connected to my surround receiver's optical input, the sound is a frame or two ahead of the audio due to the HDTV delaying the video a frame or two while it upconverts to 1080P.

The frames are 1/30th second. therefore three frames would be 1/10th second or 100ms which would be more than enough delay.

I have seen that the newer 1080 I upconverting DVD players have an audio delay of 0 to 100ms in 10 ms steps in their audio setup menue, so I know that someone knows how to do it.

I have been researching SAD 1024 bucket bagade chips.

The data says a clock of up to 1.5 MHZ can be used.

I see that these are obsolete chips.

Anyone have a simple idea of parts and basic circuit that I could use.

Any ideas would be greatly appreciated.

Thanks Bunky

Reply to
bunky
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One way to do it is to use RAM chips that are being continously writting an read but where the difference in write and read addresses provide the delay

Dan

-- Dan Hollands

1120 S Creek Dr Webster NY 14580
Reply to
Dan Hollands

You need to take the serial signal and push it through a FIFO buffer. Cypress have a wide variety but all are 9-bits or 36-bits wide. You could use just 1-bit but it would be better to de-serialise the input to match the size of the FIFO. After powering up the circuit start the write clock and then after the appropriate delay just start the read clock. The FIFO will wrap around internally.

The only hard bit is generating a clock from the incoming data stream.

--
John B
Reply to
John B

I assume the clock has to be locked to the data. Can I just use a 2mhx clock and let the sample fall as it will ???

I am more annalog in my desiging skills, and don't know that much about digital yet. dou you need microprocessors to address the FIFO chip??

Reply to
bunky

I am mostly annolog in my designs. Do you need a Microprocessor to address the inputa and outputs??

Do you need to syncronize the clock to the data. Or could you just use a higher clock speed??

Reply to
bunky

Thanks,

would have any sugusted divices I could use??

Maybe I could get a better idea by then looking up their data sheets

Thanks again

Reply to
bunky

You want to do atleast 16 times the bit-rate of the data if you're not running synchronous, (I picked 16 because that's the oversampling speed of most UARTs, which I'd say is a similar application)

set up an address counter read from the address - latch the data onto the output read the input, write it to that address advance the counter

to set your delay length either

a: modify the clock rate so that the clock naturally repeats in that time b: modify the clock count so that it takes that time to loop. c: do a combination of a and b

Bye. Jasen

Reply to
Jasen Betts

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