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Analog switch or SSR?

Well, switching the ref is probably good enough, but... - You'll still potentially have an Voffset/RS resisdual current, unless you're adding one to ensure strict null current. I guess both are Ok though. - You'll need an SPDT switch, tied to the rail, etc... or need to switch all that upside down. (depends on your load) - That one uses one SOT23 against an SO8 at best for the other solution. - I do like simple solutions :-)

Yup, that's how it'll work. Just set the minus input additionnal divider so as to provide enough, but not way too much, additional bias. Just enough to ensure you slam the opamp output to the positive rail.

Recovery? Depending on your MOSFET, that's just 1 to 3V to slew. No big deal given your 1ms requirement. Any small 1MHZ GBW opamp should give you circa 1us settling time... Plenty enough.

--
Thanks, 
Fred.
Reply to
Fred Bartoli
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Oh, I didn't realize you'd done it all with low current analog switches and not SSR's. Let me give it another look see.

George h.

Reply to
George Herold

But, wasn't the problem related to a 30V power supply? The

74HC4066 is 6V or less (and its brethren top out at 18V).

A little sugar-cube relay would be easy, though...

Reply to
whit3rd

Hi guys, Just a follow up on this thread. So of course I didn't use an analog switch or a SSR. Here's a link to the circuit and 'scope shots.

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Opamp and a couple of FETS. There are some jitteries when the current turns on, but nothing that bad.

Two FET questions. For the output FET I'm turning it off by driving the gate 5 volts below the source. Is this kosher? For the switching FET on the input I've got the gate above both the drain and the source. (driven from 5 Volt logic levels) (again any problems with this?)

Now all I have to do is measure the DS leakage current through the IRF520 when it's turned off. Every spec sheet I looked at quotes the same number for this 25uA max (@25C)

Thanks again for the ideas, etc. George H.

Reply to
George Herold

It's pretty underdamped in Fig. 3. You might want to try an RC network in the feedback loop, so that the low-frequency feedback comes from the FET source and the high frequency comes from the op amp output. Something like 47 pF and 2k might work well.

Also you could reduce the pre-shoot by not driving the FET gate so hard. Your average 2N7000 gets down to the low ohms with about 2.5-3V of gate enhancement.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

d.

the source.

in and the source.

20 when it's turned off.

@25C)

That slowish slope of the gate in figure 3 is mostly opamp getting to it's negative rail. I can make it a bit faster by dropping the source of the 2N

7000 even lower. (right now it's ~-0.5V) If I just tie it to ground then t he gate (opamp output) just kinda wanders around in no-mans land.

I tried that (1k from opamp out to gate and 15 pF.) But it didn't do anythi ng, so I ripped it out.

Hmm, OK... But I don't really care. I'm going to pulse heat for 1 second, and then wait. I'd like to know the energy in the pulse to 0.1% - 1% or so . these microsecond timing errors can pretty much be ignored.

George h.

Reply to
George Herold

That might not go to zero load current, depending on the opamp input offset and the fet on resistance. If the load is a heater, that may not matter.

Hey, I have that same Opto Sigma note pad!

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation
Reply to
John Larkin

Never mind; I missed the negative voltage on the source of the 2N7000.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation
Reply to
John Larkin

Yeah without that the gate just wanders around.

Hey, have you ever tried to measure the drain source leakage current on a F ET. The spec sheets all say 25uA max. But I'm thinking it's just a "cover your ass" spec. I've now got the gate grounded, 40V on the drain and 1 meg ohm from source to ground. I measure 0.050mV on my good DMM.. but I don't kno w if believe that... 50nA? I blasted it with a heat gun and finally got th e voltage up to a 2-3 mV. I guess I won't worry about it.

George H.

Reply to
George Herold

I'm not sure what your '5V ref' is, but if you bias a TL431 adjustable zener from the +30V, you could switch that totally off by a MOSFET shunting its bias current to ground at its input (and get a better zero on the output voltage). The TL431 circuit is adjusted with a resistor string to ground anyhow, so the 1k and 4k resistors, plus two more resistors, completes the switchable reference.

The gate can go +/- 20V, so below ground is OK; the +30 power supply, though, means it might be wise to attenuate the op amp output (or clip it, but that means adding a zener or somesuch). If you would benefit from losing the -5 supply, a diode or two in series with the source of the current-limiting MOSFET will give as good an OFF state as you need. An op amp that drives output close to GND, with an attenuating resistor pulldown between output and gate, probably are good enough without any negative supply, anyhow.

Reply to
whit3rd

Well at the moment my 5V ref is a 30k/1k resistor divider from the 30V supply. But I was figuring on using a REF05 IC. I've honestly never used the TL431. (though I have used other zener references.) I wanted something that I didn't have to adjust. Just pop it in and get a volt.

Good point. (That's one beer I owe you... assuming you drink beer*.) I stuck in a 1k/1k divider on the gate input. (bypassed the series resistor with a little cap (0.01uF) otherwise the FET was a bit slower turning on.)

Hmm I haven't thought about the power too much yet. It'll go in some box with other stuff... OK the 30/-5V will most likely become 25/-5 derived from +/-15V.. hmm or maybe we can just run it from the +15? But this will do for the moment. (My boss needs the pulsed heater for his experiments.)

George H.

*someone should come up with a beer bucks web site.. I send them money and they send you a chit that you can take to a bar for a drink. It's of course not the same as being there and sharing stories over the suds. But it would ease my guilt.
Reply to
George Herold

Just don't pull the source more than a couple hundred mV negative. All sorts of interesting things could happen.

I have data on that, that someone sent me, maybe someone here. Can't recall.

formatting link

It would be interesting to go negative on the gate; drain current might go even lower.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

I think that's too quick a network. Bump the TC up by a factor of 5 or

  1. Or are you doing this on a white protoboard?

"Remember, a part per million is a part per million." ;)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

It's worthwhile getting some TL431s to play with; the TL431B is good for 2.495V plus/minus half a percent, at 10 mA. The innards is a bandgap reference, error amplifier, and pass transistor all preassembled. REF02 (5V) costs about the same as five of the xx431's; it does better on power drain, and (I believe) output broadband noise.

Reply to
whit3rd

a FET.

our ass" spec. I've now got the gate grounded, 40V on the drain and 1 meg ohm from source to ground. I measure 0.050mV on my good DMM.. but I don't know if believe that... 50nA? I blasted it with a heat gun and finally got the voltage up to a 2-3 mV. I guess I won't worry about it.

e.pdf

Well I actually was referring to the leakage on the bigger FET (IRF520). B ut that data looks consistent. (They list the leakage for the 2n7000 as 1 uA and (1mA at 125C!)

George H.

Reply to
George Herold

OK I'm wondering if we are talking about the same 'scope shot. So 'scope shot labeled TEK003 is the gate voltage on chan. 1 and the opamp input voltage on chan. 2, as the current is switched off.

Now the bad "uglies" are on TEK001, which is the third picture I posted. (so that may be "your" figure 3.)

Anyway you prompted me to go look at it again. (I'd put it away and moved on.) And I cleaned that up too!

So now between the opamp output and the gate is a resistor divider to ground

1k/ 1k (as per whit3rd's suggestion) and now across the first (series) resistor in the divider is a 330 pF cap. (chosen a bit randomly.)

new scope shot

formatting link

As my wife says, "that's a nice clean rise time." :^)

George h.

Reply to
George Herold

Oh yeah, not protoboard, just a flying rat's nest on copper clad.

I did use some protoboard the other day. I was making a digital 1 second gate.

It takes in pulses from a signal generator and sends out a pulse that's 100 periods long, on demand. I haven't done any digital stuff (D flip flops and such) is such a long time... it was a bit painful, getting things to trigger on the "correct" slope.

George H.

Reply to
George Herold

Nah. I too thought so but I've just tested this for pA level power switches.

The outcome is that DS leakage seems to be dominated by the DS diode saturation current. Interestingly enough, it seemed that (conditional emphasized) negative gate bias slightly increased the total DS leakage. Nothing worrisome so I didn't investigate this any further.

--
Thanks, 
Fred.
Reply to
Fred Bartoli

Good to know.

Package leakage?

Jfets and Phemts have an optimum negative gate voltage, beyond which gate-drain leakage increases drain current. Mosfets shouldn't do that. Maybe.

Incidentally, BFT25s leak fA, way better than a PAD-1 at a fraction of the price.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

So it's mostly a reverse bias diode saturation current? (such a terrible name) Which is kinda independent of voltage? I was wondering if I asked the wrong question about DS leakage. Maybe I should of asked about the voltage dependence?

George H.

Reply to
George Herold

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