Analog switch

If it is switch time then FST3125 family are max 5.5ns but limited to 5V single rail operation and their off state leakage is not speccd. They work fine as RF commutating mixers.

piglet

Think outside the box and switch _amplifiers_ as in...

Select between the two different inputs.

On newer processes I've done this at hundreds of MHz. ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
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I love to cook with wine.     Sometimes I even put it in the food.

Thanks, there were a bunch of 5V parts. (I think Phil H. mentioned one here a week or so ago.)

George H.

One of your designs, Jim? (There's not a lot of stock left :^)

Any other gated opamps? I use a CLC405 as a gated RF source. (hmm looks like that's gone away too.)

George H.

TI might have something you could use. I've used their Ethernet mux and

4x SPDT switches a couple of products.

--
Chisolm 
Republic of Texas

Martein Bakker, PA3AKE has done considerable work with fast switches including the FSA3157 and FST3125. I believe he runs them at 7V.

He also documents the performance of numerous transformers and describes how significant they can be for the results. His home page is

His conclusions are very interesting:

The TS5A3159:

1ohm and pretty fast, small outline

Cheers

Klaus

Why not just use the 4066? If your reference signal is locked by a '4046 and 74HC74, just employ two more sections of the '4066: connect one as pullup, from a Q output, and the other as pulldown from a /Q output, and use the output to close the phase-locked loop. Switch timing delay gets completely nulled (as long as the components are matched).

If the 74HC74's are connected as a phase/frequency detector, both switches are turned on at the end of every sample. You have a direct short from the Q output through the 4066's and through the !Q to ground. The same problem occurs in other configurations if there is any overlap on the Q and !Q.

The 4066 resistance is too high to cause damage, but the current pulse every sample can cause ground bounce and crosstalk problems.

It's never a good idea to design a direct short from VCC to ground.

Nice thanks, That FSA3157 looks nice... maybe I should try a 5V part. (I'll stick a few on my DK order.)

George H.

Hmm well it's OK, but you should look at the specs on the fairchild parts.

It also has what looks like more charge injection than the other parts. (I'm not sure how important that is yet.)

George H.

Hi whit3rd, I'm not sure about the PLL part of that, But I was playing around with a 4066 today. I had to load it down pretty heavily (~500 ohms and less) to get it to turn off with any speed... hmm dang that might just have been my probe loading it. Anyway if I'm going to use a ~12-15V part I might as well look for somethinkg snappier.

George H.

The others seem to know what you are looking for, but it is not at all clear to me. You seem to want the "best" analog switch, but I'm not sure what the grading criteria are. I guess you want fast and low on resistance. Is that all?

Analog Devices makes some good units. I am using the ADG1411 which is a quad SPST. 2 Ohms, but not so fast at 100 to 200 ns ballpark depending on Vcc, temp, etc. It will work with supplies up to 15 V and single 12 V. Maxim has a similar part which is guaranteed to be open when powered down.

--

Rick

George Herold wrote:

I'm planning on skipping the transformer and going with capacitive coupling. That saves the bandwidth and phase shift problems plus the cost of the transformer. Pushing it a bit looks like it might give 5V p-p or a little more, which means about 2.5V swing to the ADC. It should go to

10MHz using a 74AC74 as a quad generator.

I don't know what the offset will be, have to build it and see. Maybe there's a way to compensate it out if it's constant. If you are interested, here's the LTspice file using the switch model:

Version 4 SHEET 1 1196 1240 WIRE 176 784 144 784 WIRE 304 784 256 784 WIRE 432 784 368 784 WIRE 496 784 432 784 WIRE 624 784 496 784 WIRE 800 784 704 784 WIRE 832 784 800 784 WIRE 944 784 912 784 WIRE 960 784 944 784 WIRE 144 800 144 784 WIRE 800 800 800 784 WIRE 960 800 960 784 WIRE 640 832 624 832 WIRE 432 864 432 784 WIRE 512 880 480 880 WIRE 688 880 688 832 WIRE 688 880 512 880 WIRE 800 880 800 864 WIRE 960 880 960 864 WIRE 144 896 144 880 WIRE 688 896 688 880 WIRE 480 944 480 928 WIRE 432 992 432 944 WIRE 480 992 432 992 WIRE 512 992 480 992 WIRE 688 992 688 976 WIRE 432 1008 432 992 WIRE 432 1104 432 1088 FLAG 512 880 IN FLAG 144 896 0 FLAG 944 784 R1C2 FLAG 960 880 0 FLAG 800 784 R1C1 FLAG 480 944 0 FLAG 688 992 0 FLAG 624 832 0 FLAG 800 880 0 FLAG 432 1104 0 FLAG 496 784 S1S2 FLAG 480 992 REF SYMBOL voltage 688 880 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 0 18 18 Left 2 WINDOW 3 -92 135 Left 2 SYMATTR InstName V1 SYMATTR Value SINE(2.5 2.5 9980 0 0) SYMBOL sw 432 960 R180 WINDOW 0 11 106 Left 2 WINDOW 3 17 9 Left 2 SYMATTR InstName S1 SYMBOL voltage 144 784 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 0 -8 -9 Left 2 WINDOW 3 -6 146 Left 2 SYMATTR InstName V2 SYMATTR Value SINE(0 2 1e4 0 0 -90) SYMBOL sw 608 784 R270 WINDOW 0 11 106 Left 2 WINDOW 3 17 9 Left 2 SYMATTR InstName S2 SYMATTR Value SW2 SYMBOL res 928 768 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 1k SYMBOL cap 944 800 R0 SYMATTR InstName C2

SYMBOL res 272 768 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 50 SYMBOL cap 784 800 R0 SYMATTR InstName C1 SYMATTR Value 1n SYMBOL cap 368 768 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C3 SYMATTR Value 100nf SYMBOL voltage 432 992 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 WINDOW 0 18 18 Left 2 WINDOW 3 24 85 Left 2 SYMATTR InstName V3 SYMATTR Value 3V TEXT 368 656 Left 2 !.tran 0 75m 25m TEXT 592 1088 Left 2 !.MODEL SW SW(RON=1 ROFF=1E6 VT=2.5) TEXT 344 624 Left 2 ;'Synchronous Detector Sine Wave Input 3V Ref TEXT 592 1064 Left 2 !.MODEL SW2 SW(RON=1E6 ROFF=1 VT=2.5)

Here's the PLT file

[Transient Analysis] { Npanes: 3 Active Pane: 1 { traces: 1 {524290,0,"V(r1c2)"} X: ('m',0,0,0.005,0.05) Y[0]: (' ',1,0,0.5,6) Y[1]: ('_',0,1e+308,0,-1e+308) Volts: (' ',0,0,1,0,0.5,6) Log: 0 0 0 GridStyle: 1 }, { traces: 1 {524292,0,"V(r1c1)"} X: ('m',0,0,0.005,0.05) Y[0]: (' ',1,-1.4,0.7,7) Y[1]: ('_',0,1e+308,0,-1e+308) Volts: (' ',0,0,1,-1.4,0.7,7) Log: 0 0 0 GridStyle: 1 }, { traces: 1 {524291,0,"V(s1s2)"} X: ('m',0,0,0.005,0.05) Y[0]: (' ',1,-1.4,0.7,7) Y[1]: ('_',0,1e+308,0,-1e+308) Volts: (' ',0,0,1,-1.4,0.7,7) Log: 0 0 0 GridStyle: 1 } }

Thanks Rick, Yeah there are all sorts of 100ns switches. The 100ns is the killer. I think of 100ns like an RC time constant.. so it's a frequency of 1/(2*pi*tc) and I just like to make 2*pi ~10 so that's ~1MHz. (a bit more if you are fussy)

I ordered some the the Silconix (which come in pdips!)* and the 5V fairchild in some flea spec package size. George H.

*I think everyone should order some pdips, just like I think everyone should buy beer from the store down the bottom of my hill. I don't want either to go away.

Yeah, the 4000 series parts are old-tech, and there's a CMOS logic delay because there are internal logic-level buffers. Modern variants like 74VHC4066 might be better (and non-logic-family switches better still). The old '4066 is a good low-cost item to keep in stock, you gotta love the price/performance even if you don't like the performance...

My mumblings about nulling the switch delay time were to the effect that you can run a 4x clock through the 74HC74 to get your logic drives, but you can slave the phase with a PLL chip (4046) and instead of phase-locking the 74HC74 output to the reference, lock instead to an analog switch driven by the 74HC74. That way, the phase of the switch effect is locked to the zero crossings, instead of locking the phase of the switches' logic drive.

The analog switch channel has no connection to VCC, though: the action of the analog switch is entirely from a floating coil to GND (and demodulation occurs because different parts of the coil are grounded). It was intended that the 74HC74 be only a source of quadrature signals that would supply the logical ON/OFF (digital) input to the switch.

There will be some shoot-through from Vcc to GND, inside the CMOS, at each transition, due to internal inverter logic, but that's common to all the common CMOS families, and only indirectly (through channel capacitance) gets into the signal path at all.

The possible ON-time overlap of analog switches would load the differential signal on the floating transformer winding, of course, but that only happens at zero crossing times (so should have negligible effect on the measured output).

You spoke of a pll, but it wasn't clear what kind. I discussed a pfd, which definitely has the overlap problem.

CMOS, TTL, Schottky all have the same current spike during the switching transient.

No need for a transformer with its cost and bandwith problems. I posted a LTspice file earlier showing a capacitively-coupled synchronous detector, ideally for use with the Fairchild FSA3157 and FST3125 or similar parts. It should have no problems running from 1KHz to over 10MHz using selected coupling and filter capacitors.

I also posted a LTspice file showing the results using a transformer. The maximum input voltage and output swing are determined by the switch, not by the circuit configuration. They are basically identical in both cases.

To some degree, sure, but the faster families have more crossover current, with AS and F being the worst. That's what made them faster (or the others slower, depending on your POV).