A lowpass filter for a DAC

Hi All,

I am trying to work out the likely phase lag for a lowpass filter whose job is to take out the notches from a DAC.

The DAC is 12 bit and will be generating a 400Hz sinewave. It will be driven at around 250x i.e. 100kHz. So the fundamental to filter out will be 100kHz.

I am not good at maths but doing some digging around, it looks like a simple RC has a 45 deg phase shift at the 1/2piRC point, and somewhere around 1 degree when a factor of 100 away from that (40kHz).

I am happy with 1-2 degrees of lag, but more importantly it needs to be fairly constant from 400Hz to 500Hz, or at least quantifiable, because the table feeding the DAC can be shifted to compensate.

What about a 2nd order filter? The filter performance should be better for a given phase lag, no?

Obviously perfection is impossible to achieve but I think a 10kHz rolloff frequency would produce a really clean result. The Q is what delay can be achieved at that rolloff.

There is a huge amount of stuff online but a lot of it is the audio stuff, which is full of BS :)

Reply to
Peter
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On a sunny day (Thu, 11 Nov 2021 16:13:52 +0000) it happened Peter snipped-for-privacy@nospam9876.com wrote in <smjfg7$alv$ snipped-for-privacy@dont-email.me:

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Reply to
Jan Panteltje

Much better. 2nd order lets you place the -3 dB frequency much higher than 1st order. You can run a program like FilterPro to get the curves.

The classic Williams book has graphs of attenuation and phase shift too.

250x should be easy. 3x needs more serious filtering.
Reply to
jlarkin

Jan Panteltje snipped-for-privacy@yahoo.com wrote

Thank you. That looks like both a 1st order and a 2nd order passive lowpass, with 40kHz values (10k/400pF etc) will achieve ~ 0.5 degree of phase shift.

Reply to
Peter

Getting 1/2 of one LSB of 12 bits worth of rejection at 100kHz, -75dB, and meanwhile just 1 degree of phase lag at 400 Hz, is going to be a real challenge with only 2 poles I think, if I'm understanding their requirements correct.

So I think OP needs to specify how much fundamental rejection is acceptable or I think higher order than that will be needed.

Reply to
bitrex

My bad, neglect that, I'm thinking of PWM DACs! Just need to attenuate the sinc-weighted component of the switching frequency which will be pretty low, already.

Reply to
bitrex

Given a 12-bit DAC making a 500 Hz sine wave at 100K samples/second, it will look perfect on a scope, with no filter. It would look awfully good on a spectrum analyzer too. It doesn't need much filtering.

Good thing to Spice. I have a quantizer block around here somewhere.

Reply to
John Larkin

Agreed, I have PWM on the mind. The 100k isn't full amplitude it's just the steppies.

Reply to
bitrex

John Larkin wrote: ===================

** Not on good analog one, with a sharp trace.
** Must know the app to say if harmonics or a small phase shift really matter.

But JP will never let that secret out of his bag.

..... Phil

Reply to
Phil Allison

In fact if you can clock at 250x but only need 400 Hz question is why you need a 12 bit DAC in the first place, you could do pretty good just by selectively knocking out harmonics before you even go analog e.g. this old chestnut:

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Reply to
bitrex

I'd expect that if the sine wave fits on the screen, you wouldn't see the stairsteps.

How many spot diameters fit on one screen? Surely not 4000.

Reply to
John Larkin

What you want is a linear phase low pass filter. Williams and Taylor are a full bottle on the subject.

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This means that you get a smooth and monotonic transition between voltage steps. It doesn't roll off the high frequency content of the step edge all that fast - a higher order linear phase filter will do that better, but you need more precise reactance values to keep close enough to linear phase.

The two amplifier version of the Sallen-Keys 2-pole low pass filter lets you use the same value of capacitance in both the capacitors, and you can use E92 resistors to get very close to the linear-phase characteristic.

Reply to
Anthony William Sloman

John Larkin wrote: ===============

** That is not the criterion. A small displacement of a trace line is visible, much less than its width.

On a 10x8 cm screen, one can see a step displacement of as little as 0.04 mm. With only a 2x overscan ratio, steps would be seen.

....... Phil

Reply to
Phil Allison

Why not use the signal to drive an AC motor and resistor to ground? The flywheel effect in the motor means the HF is blocked, so the resistor gets the LF signal relatively pure. Or use an iron wire instead of the motor, the skin effect at 100 kHz makes a cylinder resistance that of a .15mm tube, but at 400 Hz gets 2.5mm of skin depth... so the 1mm soft wire that wraps my Romaine does a 6:1 resistance rise between 400 Hz and 100 kHz.

Reply to
whit3rd

John Larkin <jlarkin@highland_atwork_technology.com> wrote

Indeed - the 12 bits is plenty. But I won't have 4k samples per cycle. So there will be steps larger steps than 4k/cycle.

I can see that removing the steps is not difficult, because of the huge "oversampling". They will need to be removed however, as far as possible, for EMC reasons.

Reply to
Peter

Do you mean the one here

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two of them cascaded?

Reply to
Peter

Anthony Stewart

07:38 (0 minutes ago) to sci.electronics.design You don't need 4k filtering (-72 dB) on DAC transitions, but you DO need to define PASS and STOP band accuracy needed ( eg. 0.05 dB, <1 deg) ( >-40 dB @ 100kHz and harmonics)

Something like this but in an active twin-T notch filter with a 60 kHz LPF.

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Cheers, Tony

D. Anthony Stewart

Reply to
Anthony Stewart

I believe Analog Devices has a pdf titled "Basic Linear Design" which has a lot of filter coefficients and a bit of writeup on how to implement those. supposedly gaussian and bessel are (kinda) linear phase.

I've played a bit with those in maxima. trying to calculate component values. you may keep any mistakes you find. As always you have to be careful with the scaling. plotting the actual transfer function with the parasitic Rs included will be necessary.

parallel(a,b):=1/(1/a+1/b); series(a,b):=a+b;

ZL1:s*L1; ZC1:1/(s*C1); ZL2:s*L2; ZC2:1/(s*C2); ZL3:s*L3; ZR3:R3;

/* Vi L1 *V1 L2 *V2 L3 *Vo

C1 C2 R3

*/

IR1:Vi/series(ZL1,parallel(series(ZL2,(parallel(series(ZL3,ZR3),ZC2))),ZC1)); V1:IR1*parallel(series(ZL2,(parallel(series(ZL3,ZR3),ZC2))),ZC1); IL2:V1/series(ZL2,(parallel(series(ZL3,ZR3),ZC2))); V2:IL2*parallel(series(ZL3,ZR3),ZC2); IL3:V2/series(ZL3,ZR3); Vo:IL3*ZR3;

T(L1,C1,L2,C2,L3,R3,s):=''(ratsimp(Vo/Vi));

/*the pole locations in the analog book Basic Linear Design are absolute values*/ s1:-0.8075+%i*0.9973; s2:-0.8075-%i*0.9973; s3:-0.7153+%i*0.2053; s4:-0.7153-%i*0.2053; s5:-0.8131;

X(s):=1/((s-s1)*(s-s2)*(s-s3)*(s-s4)*(s-s5));

P1:ev(ratexpand(1/(T(L1, C1, L2, C2, L3, R3, s))),R3=1e3); P2:ratexpand(1/(X(s))); M:[ coeff(P1,s,0)=coeff(P2,s,0)/coeff(P2,s,0), coeff(P1,s,1)=coeff(P2,s,1)/coeff(P2,s,0), coeff(P1,s,2)=coeff(P2,s,2)/coeff(P2,s,0), coeff(P1,s,3)=coeff(P2,s,3)/coeff(P2,s,0), coeff(P1,s,4)=coeff(P2,s,4)/coeff(P2,s,0), coeff(P1,s,5)=coeff(P2,s,5)/coeff(P2,s,0)];

res:solve(M,[L1,C1,L2,C2,L3]),numer; /* scale freq to 1.65 MHz it seems the whole prototype filter(X(s)) is not centered around the -3db freq

-25db at f=1.54 place at:4.608MHz

XXX should've put at 7.68MHz and -48db

-10db at w=1.0

-48db at w=3.0 (**)

+2.4db at w=0.1 (??)

*/

scalef(x):=(lhs(x)=rhs(x)*1.54/(2*%pi*4.608e6)); f_res:map(scalef,res[1]); parts:ev(f_res,numer);

/* [L1 = 1.786926598348852E-4, C1 = 9.43803114632655E-11, L2 = 6.250769103578177E-5, C2 = 3.951204204467418E-11, L3 = 1.378438412673788E-5] the values i have on board are a little different used those for R(s)

*/ load(bode); R(s):=''(T(180e-6,100e-12,68e-6,33e-12,15e-6,1000,s)); bode_gain(R(s),[w,2*%pi*1e6,2*%pi*4.608e6]); 20*log(cabs(R(%i*2*%pi*4.608e6)))/log(10),numer; /* yields

- 26.31120206227737dB and

- 44.04870603874216dB at 7.68MHz

- 3dB at 1.3MHz

*/

/* properly scaled

*/ scalef(x):=(lhs(x)=rhs(x)*3.0/(2*%pi*7.68e6)); f_res:map(scalef,res[1]); parts:ev(f_res,numer);

/*

[L1 = 2.088615504563594E-4, C1 = 1.103146497622583E-10, L2 = 7.306093757429039E-5, C2 = 4.618290628598281E-11, L3 = 1.611161781047285E-5]

*/

R(s):=''(T(209e-6,110e-12,73e-6,46e-12,16e-6,1000,s)); bode_gain(R(s),[w,2*%pi*1e6,2*%pi*7.68e6]);

20*log(cabs(R(%i*2*%pi*7.68e6)))/log(10),numer; /* yields

- 50.78836988946069 dB at 7.68M

- 3dB at 1.1MHz

*/

/* if I compromise on accuracy (4 bit) and choose -24db at 7.68M

*/

scalef(x):=(lhs(x)=rhs(x)*1.5/(2*%pi*7.68e6)); f_res:map(scalef,res[1]); parts:ev(f_res,numer); /*

-24dB at 7.68M

-3dB at 2.1M

*/
Reply to
Johann Klammer

Altho, if it's slow stuff like a 400Hz sine, slowly varying, you may just have to measure the zero crossing and guess the delay from that.

Reply to
Johann Klammer

Also, 1 deg of 40kHz is around 70 nS. I don't think this is relevant at all as it's well below your sampling period. you could not compensate this with your 100kHz.

Reply to
Johann Klammer

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