1 degree of *400Hz* (which is what I am generating) is 7us, which is about 1 DAC sample period.
So despite the misunderstanding, you are still very right; there won't be any realistic way to compensate for the phase shift by shifting the table.
I could have 360 samples per cycle and then 1 sample shift would be exactly 1 degree. Or the sample rate could be tweaked to exactly equal the filter delay, and then I could just delay by one sample :)
you said your lowpass has 1 deg at 40kHz.
Each dac step will be tiny, so the waveform won't make much EMI.
These days, one doesn't have to do all the math; just Spice it.
Are you rolling your own DDS in an FPGA? It would be easy to tweak the phase to arc-seconds.
snipped-for-privacy@highlandsniptechnology.com wrote
I am using DMA to stuff data into a 12 bit DAC (internal to the 32F4 CPU). The DAC sample period is determined by a timer value.
The DAC spec is a bit vague but it seems to want to see at least 1us between samples, if you want a nice output. It sounds like if you loaded it at 10MHz then it wouldn't work. But also I would need lots of RAM for the table, whih I don't want.
I realise the fact that I am generating a sinewave makes other approaches possible but a) I want to do it all in the CPU hardware and b) an arbitrary waveform capability is handy.
An update on this...
I have the synthesiser working. It looks like I will be running 64 samples per cycle. I can run way more with the hardware (up to about
500 before approaching the max DAC feed rate (400Hz sinewave out) but I also need to able to amplitude-modulate the sine table fairly fast, and even though I won't be using "double sin(x)" for that (will use a 64 sample lookup table) 64 samples will be a lot faster to modify.To answer earlier comments about 12 bit values producing steps which are invisible on a scope, that's only if you also have 4096 steps horizontally as well :) With 64 steps, the steps are extremely visible.
BTW the table is double buffered so one can regenerate one while DMA is reading the other and feeding the DACs with it.
So I will try the Sallen-Keys 2-pole low pass filter, and what sort of
-3db rolloff frequency should I aim for? For 400Hz, 64 samples, so the fundamental of the steps is ~25kHz, 5-10kHz would seem to be in the right ballpark?
Some here mentioned using E92 resistors. Is this required? I see a lowpass SK filter here
Peter snipped-for-privacy@nospam9876.com wrote
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