4-Layer boards

We have necked down segments of traces, usually to compensate for some point capacitive loading. That might be a part pin or a connector pin. I don't have good tools to math that, so we guess or x-acto it.

ATLC helps sometimes, but it's not 3D.

You can see some of that going on here, in the SD24 sampling head.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com

No, I haven't been thinking about B at all. (I was trying to avoid it.) (Some reasoning along the lines of, B fields won't be important until the strip line is looking like a wave guide, high freq. for these small distances.) ... Huh, so minimizing the loop area minimizes the B term... least inductance?

I must admit my grad school EM was lacking, by the time we got to antenna's and more advanced dynamics the semester was over (Jackson) I guess I should go read those chapters myself.

George H.

Den torsdag den 7. april 2016 kl. 19.16.46 UTC+2 skrev Tim Williams:

I have Ott somewhere, it was easily the most expensive book I had to buy for Uni, I think roughly twice as much as any other book

-Lasse

I understand images.. well I solved some problems way back when. To me at least, images are electro-statics... Why do the images contract at high frequency.

It's not a time effect is it?.. 1ns ~30cm (20 in pcb.) 1/10 of that is 2 cm..

Scratching, George H. If

I'll have to go look in Jackson or Collin to refresh my 30-odd year old mem ory of the details. The image method quits working at high frequency becaus e the boundary conditions are more complicated outside the electrostatic li mit. There are ways of fixing it up, but the usual thing is to use an integ ral equation.

It might be sort of fun to do a Galerkin-style solution to minimize the tot al field energy. Variational principles are powerful for that sort of job.

Cheers

Phil Hobbs

Why would the current density at the edge be any greater than the center of the trace? It's all surface.

The idea is to get the trace close (WRT its width) to its reference plane, no?

Skin effect is caused by retardation of current that creates a B field in a conductor, because dB/dt in a conductor causes back-EMF.

A filament of current in mid-ribbon creates a B field in metal to its immediate left, and to its immediate right. A filament of current at the ribbon edge creates a B field to its immediate left, but NOT to its immediate right.

Oh... And you were saying I should be thinking about sorta "skin depth" effects in the plane* of the copper to explain current crowding... I've been focused on the fields in the air/fiberglass. G

*you'll have to excuse some of us for only thinking about skin depth in the narrowest direction...

Oops, sorry we had to log my daughter on for gmail. George H.

Yeah, I mangled the description, it's because the dB/dt causes EMF everywhere around the edge-of-strip current, but only induces counter-current on one side (where there's metal) and not on the other surroundings (insulator). Current in mid-strip sees back-EMF from both flanks. Edges win current because back-EMF is from one flank only.

And, current above a ground plane induces counter-current in 1/r falloff fashion, in the ground plane. Proportional to frequency (because of the d/dt part) and inverse to spacing (because we assume conductor lengths much longer than groundplane distance).

What do you mean "all"? The surface quite clearly ends! Otherwise there wouldn't be a trace width! :)

Sure, but that doesn't always happen. Average stackup, traces under ~7 mils won't be all that close. Need a >100 ohm trace? There you go. Needless to say, the frequencies where you'd see edge effect are extreme, too!

You'll get into trouble with kW worth of RF amps (100 MHz+), because the transistors are low impedance and high frequency, and the traces are wide (and carrying a lot of reactive power as well).

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

If you look at E&M within a metallic structure, then:

- At extremely short time scales (say you're launching a 10ps edge down a transmission line), nearly 100% of the energy is contained within the E&M field, in the space between conductors. Some image current flows in the conductors, but they're more like diamagnetic waveguide walls in the process. (Indeed, it might be easier to express a metal as dielectric with large complex e_r.)

- At intermediate time scales, current diffuses into the material. This occurs more quickly where current density is stronger (it's being pushed in). Current density is concentrated around outside corners (such as trace edges), which are also the regions that carry stronger fields (the edge conditions lead to stronger div E and curl B).

- At DC time scales, eventually the current diffuses fully into the material, and takes the shortest resistive path. For the serpentine-trace-over-ground-plane condition, this could take a very long time (on the order of the trace length, not just the trace width).

Calling it "diffusion" is actually apt, because skin effect has a sqrt(f) behavior.

It's noteworthy that |B| doesn't go to zero at the surface of a metal. It takes some depth to do so, and this depth depends on the rate of change.

Because of all this, eddy currents in any E&M boundary condition (from transmission lines to transformers and solenoids) tend to diffuse inward at a known velocity. One consequence of this is, inside a round conductor, current density can go to zero and completely reverse inside.

This leads to interesting results if your goal is to heat wire uniformly on an induction heat treating line, and you chose the wrong frequency!

(Traditional skin effect is derived with an infinite-plane condition, which gets the simple exponential decay of current with depth. When it's done for round wire instead, you get the circular equivalent: Bessel functions. In essence, the wave from one side of the wire interferes with the wave from the other side, introducing zeroes and reversals near the center.)

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

You can do Gen1 PCI Express without worrying too much about subtelties, like maintaining impedance through vias. Gen1 is 2.5 gbps per diff pair, with 80 ps or some such edges. Faster stuff can be difficult. But trace losses and dispersion are bad at high speeds, so the transmit and receive chips include equilization to bang the signals back into shape.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics

Yeah -- a lot of board and cable level signaling is chock full of quirky methods (large thresholds, predrive / equalization, line codes, not to mention more advanced lattice and ECC codes), specifically because those pathways are so bad. Which means you can usually be pretty lazy about it... to some extent.

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

You're assuming that there is no thickness to the trace - the skin depth is greater than the cladding thickness? I.E, a two dimensional hunk of copper?

But no filaments on top or bottom?

That's the "mid" regime I mentioned, where you might get edge effect instead of skin effect, especially for high aspect ratio conductors.

If it's "2D", then current density will be largely the same across the thickness, as will the amount of B-field penetrating it. In that case, there is no "top or bottom", in the sense that, thickness is so small, they are one in the same.

When it's acting 3D, there are filaments on the top, but they are much less dense (current density is smaller), because (among equivalent explanations):

- The B field is much more spread out

- The image current is distant (what's the image anyway, the ground plane around the back side?)

- There's no boundary condition to "compress" the B-field (i.e., a diamagnetic ground plane to exclude B) etc.

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

The "image current" is the current that would be flowing behind the ground plane to create the electric and magnetic fields that exist at the surface of the ground plane. It's a useful fiction.

Except that the ground plane is conductive enough that any magnetic field penetrating the ground plane induces a current that essentially cancels that magnetic field. Obviously not true at DC but useful at higher frequencies.

--
Bill Sloman, Sydney

Out of curiosity: do such dense BGAs make sense at all? What advantages do they have compared to raw chips and thermosonic bonding directly to the PCB, as in the music playing postcards, calcs and watches?

Bets regards, Piotr

Much higher lead count

Better signal integrity (no bond wires)

Reworkable

Better thermomechanical stability with large chips (underfill)

Lower assembly cost

Cheers

Phil Hobbs

(Trying out alpine since thunderbird has got so bloated)

-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203 Briarcliff Manor NY 10510

hobbs at electro> John Lark>