1G resistor

Ooops, I mislabeled the 3.2mm side.

Cheers, James Arthur

Reply to
dagmargoodboat
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The waveforms that I'm seeing, in this setup,

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sure look like a 1G resistor paralleled by a little bit of capacitance. It doesn't look like an RCRCRC... string.

I need to experiment more. Warm up the trusty ole Dremel.

My ground plane will be layer 2 of 4, namely about 20 mils below the surface.

Reply to
John Larkin

After an unreasonable amount of pondering, we decided to do the 1000:1 pickoff like this:

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C1 will be the capacitance through the FR4 from a pad on layer 4 to the resistor pad on layer 1. We'll cut a big window in the layer 2 ground plane to let the charge through.

If the pad on layer 4, the lowside C1 capacitor plate, is the same size as the 2512 resistor pad, I estimate 0.15 pF, ignoring fringing and ground plane shielding. We can select C2 to adjust for whatever the capacitance actually is.

The trick would be to tweak the ground plane cutout to cancel the fringing. I don't know how to calculate that.

The opamp goes crazy if the pot is all the way up, C2 effectively zero, so we won't do that.

Low value high-voltage caps are crazy.

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--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

On Thu, 19 Nov 2015 15:22:49 -0800, John Larkin Gave us:

Many f my HV supplies had a circuit board cap with the HV feedback resistor to provide a feed forward drive.

Ours was about 0.375 x 1.25 inch, with rounded corners.

Our entire HV section where the multiplier was and the feedback resistor was bare PCB. No mask and no ground plane at all. Potting detaches from mask, and corona can bore a hole through the FR4 to get to the embedded (or otherwise) ground plane if there is HV above it.

So our HV feedback resistor as well as the PCB fashioned feed forward cap was in a section sans mask and sans ground plane.

No series cap required.

Reply to
DecadentLinuxUserNumeroUno

This board will be conventional 4-layer with ground plane and solder mask both sides. No potting or coating. It's "only" 1400 volts in the HV supply, so that should be OK. I'll just need to be careful about clearances.

I'm doing the schematic entry and layout myself, to get used to the new version of PADS. I've only found two ways to hard-crash it so far. Their support people don't seem to be very interested.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

On Thu, 19 Nov 2015 16:27:04 -0800, John Larkin Gave us:

Well I just noticed that all you were making was a monitor. I thought it was part of the regulation feedback loop.

But PCBs can be made with masked and unmasked areas. The only requisite is that you have to make it *very* clean and vacuum and bake it to remove any water as FR4 is hygroscopic. 1400 volts is above the point at which I potted. You could be asking for problems if you don't pot your HV section.

Reply to
DecadentLinuxUserNumeroUno

The feedback in the HV supply comes from the first C-W stage, which is only 350 volts. That doesn't need lead compensation. The 1400 volts is regulated by implication.

This is it, so far:

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That makes +1400 to feed two 0-1200 volt linear regulators, and each one of those feeds an output pulse generator, and that's where we have the 1000:1 pulse monitors. Lotta stuff.

We might conformal coat it if we have any problems. The board isn't suited to potting. And potting is an awful mess anyhow.

If I go with 20 mils from L1 to the ground plane, that's only 70 volts per mil vertically, which is super conservative. And I could go with a lopsided stackup and make the L1-L2 dielectric thicker.

One reason to do the layout myself is that it's easier than explaining all the constraints to my layout guy. He's busy on other stuff anyhow.

Reply to
John Larkin

I think it *has* to be an RCRCRC string. If we split the element into 10 slices from one terminal to the other, each slice has 100M and .255pF to GND, no avoiding it. I think.

I guess some weird serpentine pattern might confuse things by capacitively coupling a feed-forward current from an early section across to a later section.

That changes my shunt calculation to 1.88pF, 2512-element to gnd plane.

Cheers, James Arthur

Reply to
dagmargoodboat

The positive feedback makes it look like an oscillator.

Wouldn't it be easier just to do this?

| 1G | |\ U1 +---+-------|+\ | | | >--+- 1M --/ C1 .-|-/ | | -/- | |/ | | |50pF '-------' === ===

I trust your 30fF terminal-to-terminal measurement, which means you'd need 30pF @ C1-U1 node to compensate. No stability risk.

If you _really_ want to make FR4 caps you could make the whole 1000:1 cap divider in FR4. Then the legs would at least track each other, anyhow, and the divider ratio should be pretty well-controlled by the lithography.

Cheers, James Arthur

Reply to
dagmargoodboat

The waveform looks like a lowpass filtered square wave, namely a soft triangle, with small jumps at the peaks. The jumps are the pure capacitive, 6 fF shunt component. The triangle is the 1G resistor charging the 108 pF scope and cable.

There is some change in the trianglish shape as the resistor is lifted off the PCB surface, so there is some RCRCRC... component to the waveform.

I think the best thing for me to do is add some real capacitance across the 1G resistor to swamp all that messy parasitic stuff.

Reply to
John Larkin

On Thu, 19 Nov 2015 19:42:48 -0800 (PST), snipped-for-privacy@yahoo.com wrote:

It's just a small capacitance in parallel with the 1G resistor. That won't oscillate.

The resistor, flat on the board, looks like 6 fF. Sitting on some solder, it might look like more, but I don't know how much. And, as you note, there is probably some RCRC path, so the capacitance is not pure. C1 is pure, so they might not compensate to a clean step.

So, I'll add capacitance across the 1G, enough to swamp the native stuff. That will make C1 big.

So I get this:

Version 4 SHEET 1 1072 680 WIRE 320 0 32 0 WIRE 448 0 320 0 WIRE 528 0 448 0 WIRE 576 0 528 0 WIRE 976 0 880 0 WIRE 976 32 976 0 WIRE 880 64 880 0 WIRE 320 80 320 0 WIRE 448 96 448 0 WIRE 32 160 32 0 WIRE 880 192 880 144 WIRE 320 208 320 160 WIRE 448 208 448 160 WIRE 448 208 320 208 WIRE 848 208 448 208 WIRE 976 224 912 224 WIRE 1024 224 976 224 WIRE 1040 224 1024 224 WIRE 848 240 800 240 WIRE 320 256 320 208 WIRE 448 272 448 208 WIRE 32 304 32 240 WIRE 800 320 800 240 WIRE 976 320 976 224 WIRE 976 320 800 320 WIRE 448 400 448 336 WIRE 592 400 448 400 WIRE 800 400 800 320 WIRE 800 400 672 400 WIRE 880 400 880 256 WIRE 448 432 448 400 WIRE 320 448 320 336 WIRE 880 560 880 480 WIRE 448 576 448 512 FLAG 32 304 0 FLAG 320 448 0 FLAG 528 0 PULSE FLAG 1024 224 MON FLAG 880 560 0 FLAG 976 32 0 FLAG 448 576 0 SYMBOL res 304 64 R0 WINDOW 0 -65 42 Left 2 WINDOW 3 -68 81 Left 2 SYMATTR InstName R1 SYMATTR Value 1G SYMBOL res 304 240 R0 WINDOW 0 -68 40 Left 2 WINDOW 3 -87 85 Left 2 SYMATTR InstName R2 SYMATTR Value 1Meg SYMBOL cap 432 96 R0 WINDOW 0 63 10 Left 2 WINDOW 3 57 46 Left 2 SYMATTR InstName C1 SYMATTR Value 150f SYMBOL cap 432 272 R0 WINDOW 0 64 9 Left 2 WINDOW 3 53 45 Left 2 SYMATTR InstName C2 SYMATTR Value 300p SYMBOL voltage 32 144 R0 WINDOW 0 -78 146 Left 2 WINDOW 3 -260 208 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(0 1200 1u 10u 10u 1m) SYMBOL Opamps\\UniversalOpamp2 880 224 M180 WINDOW 0 35 46 Left 2 SYMATTR InstName U1 SYMATTR Value2 Avol=1Meg GBW=3Meg Slew=3Meg SYMBOL voltage 880 384 R0 WINDOW 0 65 37 Left 2 WINDOW 3 73 72 Left 2 SYMATTR InstName V2 SYMATTR Value 5 SYMBOL voltage 880 48 R0 WINDOW 0 -86 39 Left 2 WINDOW 3 -80 75 Left 2 SYMATTR InstName V3 SYMATTR Value 5 SYMBOL res 432 416 R0 WINDOW 0 49 55 Left 2 WINDOW 3 46 88 Left 2 SYMATTR InstName R3 SYMATTR Value 500 SYMBOL res 688 384 R90 WINDOW 0 -46 61 VBottom 2 WINDOW 3 -41 58 VTop 2 SYMATTR InstName R4 SYMATTR Value 500 TEXT -272 64 Left 2 ;1000:1 HV PICKOFF TEXT -216 192 Left 2 !.tran 2m TEXT -256 120 Left 2 ;JL Nov 19, 2015 TEXT 560 464 Left 2 ;POT

where R3 and R4 are a 1K pot which tweaks the step response to nice.

C1 will be some deliberate PCB capacitance, maybe a bit more than

150f.

It would probably be hard to get a controlled 1000:1 cap ratio. I wouldn't know until after the boards were built.

Reply to
John Larkin

On Thu, 19 Nov 2015 21:07:25 -0800, John Larkin Gave us:

snip

We used these...

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Reply to
DecadentLinuxUserNumeroUno

I meant it looks like the classic Colpitts oscillator's tapped-capacitance feedback.

It only oscillates if there's a parallel inductance w/Q>1 (you need the voltage boost of resonance), or if the cap loading messes up the op-amp's feedback.

I believe that's a measurement technique artifact. Your pulse method wouldn't easily see the very long settling tail. It also makes zero sense that *removing* the FR4 dielectric *increases* capacitance.

It simply must be that your pulse is being capacitively shunted to the PCB, making a smaller output when the 1G is board-mounted.

A quick check: The end caps (terminations) of your specific part are .7 x 3.2mm, and

6.5 mm apart.

k(Al2O3) = 9.7, e_o = 8.854e-12 F/m

.7e-3m x 3.2e-3m * k(Al2O3) * e_o -------------------------------- = 30fF 6.0e-3m

(I used 6mm separation instead of 6.5 as a fudge to partly account for the resistor's terminations encasing the Al2O3 substrate ends--the terminations are not flat plates.)

Just treating the terminations as plates separated by 6mm of alumina, it's not possible for the capacitance to be 6fF. That's why I believe the

32fF measurement.

If the 1G's native shunt capacitance is 30fF, the compensating cap for a

1000:1 divider is 30pF--imminently manageable.

That certainly works.

That part I don't like. It'll drift with the FR-4. The value matters, and it's hard to assure accurately.

It's really *easy* to control for larger values; just make a 1000x bigger plate. I agree that fringing makes that dicey when you're making fF.

That's why I prefer the idea of taking C1 entirely off board and untainted by the FR4, using just the native shunt capacitance of a 6532 (2512) chunk of alumina with two endcaps. That's stable, predictable, and repeatable. Slot out the FR4 beneath to keep it that way.

Then, placing a reasonable compensating cap as the lower-leg in the divider becomes trivial. FWIW.

Cheers, James Arthur

Reply to
dagmargoodboat

I'm trying to sample a fast pulse, including the roughly 10 us rising edge. In that time domain, the effective capacitance is 6 fF.

But that doesn't work when the resistor is flat on the board. The ground plane gobbles up most of the signal.

It's a pulse sampler. A scope probe. The FR4 won't drift much, probably not 1%, and a couple of per cent wouldn't matter.

Right. The big cap is the easy one. The R ratio must match the C ratio, so if the C ratio is off, I'd have to fix that, then fix the overall gain.

I'd like to just buy a 0.47 pF 1500 volt cap. I might if I can find somebody who will sell them to me for less than the price of a steak dinner.

The compensation will always need to be trimmed, I think. Like a scope probe.

Reply to
John Larkin

Den fredag den 20. november 2015 kl. 16.19.03 UTC+1 skrev John Larkin:

three of these?

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-Lasse

Reply to
Lasse Langwadt Christensen

Okay, with that info, agreed. Revisiting, the time constants in question should be on the order of (100M * 250fF) = 25uS. If that doesn't matter, then it doesn't matter.

Right. I'd said to slot it out to prevent that.

In that case your construction seems fine.

Yep. You just need two electrodes on either side of a ceramic chunk. It's almost tempting to make an air dielectric cap from a plated slot. :-)

But the DgiKey parts were reasonable options, >Then, placing a reasonable compensating cap as the lower-leg in the divider

Yups. We're not the first to encounter this problem.

Cheers, James Arthur

Reply to
dagmargoodboat

On Fri, 20 Nov 2015 08:55:25 -0800 (PST), snipped-for-privacy@yahoo.com Gave us:

That's the hole idear.

Reply to
DecadentLinuxUserNumeroUno

How about an SMB connector with a blank cap on it? That would be somewhere near right.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

These ones

are under $3 in hundreds.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

I wouldn't mind three 1206s, but 150pF is too high.

1pf per cap would be good, maybe 3, but those are hard to buy.

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Prices are crazy.

Reply to
John Larkin

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