0.01% resistors

Good point. I'll check it later tonight.

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward" 
speff@interlog.com             Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany
Loading thread data ...

u

rty

.

for

an

and > > were very glad about it.

es > > of ratio transformers. You don't have to work too hard to get 1ppb absolute > > accuracy out of a bifilar-wound ratio transformer. The more us eful beasts

Rayner and Kibble isn't short of references, and is a bit more explicit abo ut plugging you into the National Standards Laboratory literature.

Hague and Foord is thicker, but it's also a lot older. What Amazon is now a dvertising is the sixth edition from 1971. IIRR the first edition came out in the 1920's.

Neither book is exactly into using modern integrated circuits - Rayner and Kibble do talk about some active circuits, but their whole approach is just as conservative as you'd expect from National Standards Labs employees,

If you did get a bit more creative, you could probably do better (but it wo uld be a time-consuming development, and not all that cheap).

But it looks big enough and old-fashioned enough to appeal to National Stan dard Labs type customers.

It always makes life easier.

You don't get a DC ratio from a ratio transformer. You are shifting a very well-defined AC ratio into the direct-current domain by some kind of demodu lation or rectification.

My sole venture into this area was a precise - if slow - isolation circuit for 1V to 5V (4mA to 20 mA) signals. The isolating transformer had three wi ndings, only one of which had to carry much current. It spent most of it's time being driven so that the second and third windings generated the desir ed DC voltages on either side of the isolation barrier.

This current was monitored, and whenever it got too high, it was driven dow n to the opposite end of the tolerable range. The two feedback windings had to be isolated - and the output voltage maintained by a sample-and-hold - while this was going on. The errors were essentially the off-set voltages o f the op-amps involved - 748's as it happened (since this was back in 1975) .

I'm not recommending this as a solution for your problem - whatever it is - but more as an example of a bit of lateral thinking in the general area.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

We had a nice thread "SMD TC" about precision PWM (and precision resistors) last year.

In particular James Arthur came up with a nice scheme to cancel supply ripple effects which would otherwise create errors, reproduced below in full.

Of course I don't know if this will get to 10ppb but I would think some PWM scheme would be the way forward. I think flukes calibrators use PWM and do approach this level.

(James' original post follows) ===========================================================================

OK, after six months, six or seven days most weeks (and, due to committing to a not-so-clearly defined project, mostly for free), I've just gotten my gadget in shipping-shape.

So, time to play!

Here's the basic PWM:

......................... : Vref >----/\/\/-----O : R1 \ : R3 \ : 1M O-----/\/\/---+-----> Vout : | R2 : --- Cf 0 >----/\/\/-----O : --- : | ........................: | === Fig. 1

To me, 16 bits on the cheap is plenty cool. But if the bar is doing something extraordinary, like 1ppm, then it seems fair to use fancier parts.

So, let's assume an FPGA and 100MHz clock rate, driving the switch. The switch can either be the FPGA output, or an extra gate (or paralleled gates).

We can get 1ppm modulating 100Hz in 10nS chunks. Or 40Hz in 25nS chunks, etc. Whatever works out with our switch-speed.

Switch mis-match (R1-R2) produces a code-related error, maximized at mid-scale. With R3=1M, my algebra says ----/\/\/-----O : | | R1 \ : '-' \ : | R3 O----+--/\/\/---+-----> Vout : | R2 : --- Cf 0 >----/\/\/-----O : --- : | ........................: | === Fig. 2

If Vcomp is such that i(R4) = i(R3), the voltage drops (errors) across R1 and R2 disappear. This next version does that.

C1 Vpwm >-----+----||----. .-. .-. | | _| |__| |_ =2Vrefp-p| | | .-. .....................V... | | R4 : . : | | 100K, 1% Vref >----/\/\/-----O . : '-' R1 : \ : | R3 : \ : | 100K, 1% : O---------+---/\/\/---+-----> Vout : : | R2 : : --- Cf 0V >----/\/\/-----O : R4=R3 --- : : | .................:......: | === Fig. 3

C1-R4 re-create the same currents as flow in R3. Effective switch resistance (R1, R2) is lowered by about two orders of magnitude, allowing us to reduce R3 and lower the output impedance.

Filtering the 100Hz PWM to 1ppm takes 14 time-constants = 140mS.

So, Fig. 3 is a working solution. It's linear and accurate, but needs a hi-z buffer amp and it's slow. A 16-bit version could be faster, with lower-z output. Or, splitting the DAC up into two sections improves both those properties too.

C1 Vpwm(hi) >------------+---||---. .-. .-. | | _| |__| |_ =2Vrefp-p| | | | .....................V... .-. : . : | | R4 Vref >----/\/\/-----O . : | | R1 : \ : '-' : \ : | R3, 0.05% : O-------+--/\/\/---+---/\/\/--+-----> Vout : : | Rf | R2 : : | --- Cf 0V >----/\/\/-----O : R4=R3 | --- : : | | .................:......: | | | === | | Vpwm(lo) >------------. | | | | | .....................V... .-. : . : | | R7 Vref >----/\/\/-----O . : | | = 1000 x R3, 0.05% R5 : \ : '-' : \ : | : O------------------' : : R6 : : 0V >----/\/\/-----O : : : .................:......:

Fig. 4

If the upper and lower DACS cover 1,000:1 each, we could lower the clock frequency to, say, 10MHz, pump it with a uC, and still have a

10kHz composite waveform that one-pole-filters to 1ppm in 14 * 100uS = 1.4mS.

The R7-R3 ratio is critical to absolute accuracy and monotonicity. The top DAC divides Vref accurately into 1,000 parts, so a 1% error in the R7-R3 divider ratio represents an error of 1 part in 100 of

1/1,000th, or 1 part in 100,000 overall. 0.05% ensures 0.5ppm.

Likewise, to ensure monotonicity to 1ppm, the lower DAC's contribution of 1,000 lsb's cannot be off by >1 part (lsb) in those 1,000 lsb's, or

0.1%

The low DAC represents a small, code-related d.c. load on R1, R2 via R7. That needs to be either kept small, or compensated.

Back to the topic of this thread, the effect of T/C errors in the divider resistors is reduced by the divider ratio, a factor of 1,000.

So, there's a stable, accurate, 1ppm PWM DAC made with non-critical parts.

--
Cheers, 
James Arthur 

====================================================================== 
(end quote)
Reply to
John Devereux

On an existing design I use a Howland current pump for high side current measurement. For a new application of the board I need to improve the current range at the low current end and found I was getting too much variation. That means accurate measurement of 1mV with a varying high side voltage around 16V.

I've tried it on some existing boards having changed the op amp to an OPA2180 and get a 2 to 1 variation in readings forthe same current. Most boards are OK.

So I either need better resistors or a better method of high side current measurement.

Reply to
Raveninghorde

The howland current pump is a crappy circuit (as has been pointed out to me here).

What about something like this

Reflects the current so it is referred to the 0V rail, stripped of it's

16V offset.
--

John Devereux
Reply to
John Devereux

Or perhaps an instrumentation amplifier

formatting link

formatting link

John Devereux's precision voltage to current converter would probably be cheaper. Rail-to-rail input op-amps will work with their inputs pretty close to the positive rail.

So does the venerable LM301A though performance isn't guaranteed close to the positive rail.

formatting link

The op amp output has to drive the input of a P-channel MOS-FET and can be kept well away from the 16V rail.

Stability may need some attention at very low currents.

--
Bill Sloman, Sydney (but in Nijmegen at the moment)
Reply to
Bill Sloman

I meant to post a link to Linears AN105 too:

Linears application notes are a bit like Wikipedia; they can inflate your apparent IQ by 30 points on usenet :)

--

John Devereux
Reply to
John Devereux

Only if you know enough about what you are posting to avoid posting duff information. Some Wikipedia articles, like some application notes, are not to be relied on.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

That's what I normally do- the Howland thing is seriously sub-optimal.

You may have to add a zener or something like that to keep the input within the op-amp's common mode range (between the two upper resistors and 16V, and maybe a resistor to ground) or to keep the supply voltage of the op-amp low enough for a low-voltage R-R input op-amp.

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward" 
speff@interlog.com             Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

Oh yes of course I was just showing the principle. With the FET output most of the circuit could ride up near the supply, so it could work with very high voltages in principle, even with a 5V opamp say.

But there is e.g. OPA170 which is a $0.40, 36V, rail to rail opamp.

--

John Devereux
Reply to
John Devereux

As far as I can see that doesn't work if the output is shorted.

Reply to
Raveninghorde

No, although the output will indicate some high full scale value I think.

You did say it was around 16V...

If it really has to work 0-16V, and you also need 1mV precision, then there is not getting away from the big bucks resistor.

Or does the 16V supply collapse too when it is shorted? Like you are measuring current using a high side resistor on the output side of a current limited regulator?

Battery charger?

You could look at the "flying capacitor" circuit as found in that linear app note.

--

John Devereux
Reply to
John Devereux

At least you are free to fix Wikipedia.

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward" 
speff@interlog.com             Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

r

So your Howland circuit runs off completely independent power rails - apart from sharing a common ground.

Then you should take a serious look at an instrumentation amplifier, driven from the same independent rails.

--
Bill Sloman, Sydney (but in Nijmegen at the moment)
Reply to
Bill Sloman

Spehro Pefhany wrote in news: snipped-for-privacy@4ax.com:

This looks better;

# Circuit Ratio LM317 LT1964 LT1761 TL431

0 -- 1.000 1.25 -1.22 1.22 2.50 13 "(a|b) + (c+d)", 0.800 1.56 -1.53 1.53 3.12 19 "(b | (a+c)) + d FB a-c" 0.800 1.56 -1.53 1.53 3.12 4 "a+ (b+c+d)", 0.750 1.67 -1.63 1.63 3.33 2 "a + (b+c)", 0.667 1.88 -1.83 1.83 3.74 7 "(a|b) + c", 0.667 1.88 -1.83 1.83 3.74 9 "a + (b + (c|d))", 0.600 2.08 -2.03 2.03 4.16 11 "a + ((b|c)+d)", 0.600 2.08 -2.03 2.03 4.16 17 "(b|(a+c))+d", 0.600 2.08 -2.03 2.03 4.16 1 "a+b", 0.500 2.50 -2.44 2.44 4.99 5 "(a+b) + (c+d)", 0.500 2.50 -2.44 2.44 4.99 15 "((a|b) + (c|d))", 0.500 2.50 -2.44 2.44 4.99 12 "(a+(b|c)) + d", 0.400 3.13 -3.05 3.05 6.24 14 "((a|b)+c) + d", 0.400 3.13 -3.05 3.05 6.24 3 "(a+b) + c", 0.333 3.75 -3.66 3.66 7.49 8 "a + (b|c)", 0.333 3.75 -3.66 3.66 7.49 6 "(a+b+c) + (d)", 0.250 5.00 -4.88 4.88 9.98 10 "(a+b) + (c|d)", 0.200 6.25 -6.10 6.10 12.48 16 "(a) + (b|(c+d))", 0.200 6.25 -6.10 6.10 12.48 18 "a + (b | (c+d)) FB c-d" 0.200 6.25 -6.10 6.10 12.48

Best regards, Spehro Pefhany

--
"it's the network..."                      "The Journey is the reward" 
speff@interlog.com       Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog Info :  http://www.speff.com
Reply to
Spehro Pefhany

Cool. What are those FB minus things?

--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

Another option is an auxiliary over-the-top supply. Then you can use a low-side sensing technique, and reflect the output off the ground rail.

A little messy parts-wise, but simple, solid, and accurate.

--
Cheers, 
James Arthur
Reply to
dagmargoodboat

My original was in context of making an opamp booster stage.

Resistor network on the opamp output to ground. Feedback to opamp - from some point in the network. The FB indicated where the feedback was taken from, where this could not be indicated by bracketing.

--

John Devereux
Reply to
John Devereux

John Larkin wrote in news: snipped-for-privacy@4ax.com:

Cool. What are those FB minus things?

From John D's nomenclature- eg.on the bottom one you take the feedback (adj pin) from the junction of the two series resistors c-d.

Other combinations give the same ratio when all the resistors are equal, but maybe the series resistance or divider output resistance is more suitable in one case than another.

Best regards, Spehro Pefhany

--
"it's the network..."                      "The Journey is the reward" 
speff@interlog.com       Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog Info :  http://www.speff.com
Reply to
Spehro Pefhany

It says "TaN" on the schematic. I think you're right.

--
"Design is the reverse of analysis" 
                   (R.D. Middlebrook)
Reply to
Fred Abse

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.