I am newbie to pcb design and currently working on a design/layout of a board. I have an external clock to my board coming through a SMA connector and this one I am kinda doing a Y to split into two clocks to go into separate buffers before routing to the corresponding chips. The frequency I am dealing here is max of 20 MHz and rise times of 2-5ns. And I am routing the signal on the board for a length of appx 1-2in. So I guess I shouldnt have any transmission line effects. Now my question is if I routing the main clock signal with a trace width of 10 mils, what should be those individual traces with after Y ing (clk1 and clk2 traces width) ?
--------------- clk1 | MCLK(10mils)--------------| | ---------------- clk2
And I am just curious to know this, if I was dealing with high enough frequency/rise times that my system here is considered as transmission line. then assuming 50 ohms traces, is it right if i do a AC termination close to the receiever with 100ohm and say 100 pF cap on each clk(1 and 2) line? what happens to the width of the traces after Y ing in this case. just curious to learn these things. thanks much