Is there a way to match impedance for a circuit given typical input and output stages of transistors for square wave (and other) types of inputs? Was wondering if there were such a function in spice type cad simulators (e.g. orcad) that would compute the proper loads given networks of R, C components, and later stages of transistors. Part of issue is that I'm not certain how to do it without spice utils, so it maybe the cart before the horse situation. Thanks.
Why? Here we go again. This matching impedance thing. Impedances, by and large, in most circuits do not need to be "matched". In most cases, for voltage amplifiers, the idea is have an output impedance < 1/10 of the input of the following input impedance so as not to lose too much gain.
For a low noise bipolar design, the optimum noise is given by around about re=Rs/sqrt(hfe), and since ri=hfe.re, one can argue that there is a matching being done.
In some cases, one choses an impedance based on bandwidth. That is, if there is a capacitive load shunting it wiyth a resistance will increase the BW, at the expense of less gain.
No.
In most cases there is no such thing as a "proper load".
I don't think you understand the concept of input and output impedances, and when one would want to "match" them or not. Spice isn't going to be much help until you understand the theory behind it all. GIGO.
Kevin Aylward snipped-for-privacy@anasoft.co.uk
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Agree. Thing is, this is often taught vaguely or even wrong at universities. Once a professor was seriously saying that the output impedance of a transmitter must be equal to the load impedance. I just started day dreaming after that, imagining how all those big AM transmitters would start to glow white hot.
Then I went back and showed him the design of one of my amps plus that of a commercial one. "Ahem, well, errr ...."
Yes, that's about the only scenario where matching is a must to squish out that last tenth of a dB in SNR.
Now we'd just have to teach the designers of, for example, TV buffer amps or TV sets in general that there are a few other things that matter. Such as dynamic range...
I have a low power design that I'm trying to develop, and think matched impedances will provide most efficient results.
The simulation model shows this odd transient (dampened ringing) that I suspect is due to mis-matched impedances, which are not seen in the design reference circuit.
Desire to understand basics of how to match them given source and load situations/stages, how it translates into better design performance, and what the manifestations/problems/characteristics are of badly matched impedances.
For #3 I have read that when designing a communications bus, for example, mismatched impedance results in standing waves, and reflections. Although I am dealing with an analog design that has nothing to do with a bus, clearly the importance of impedance matching makes a big difference given these types of problems. I realize this is only anecdotal, and therefore not necessarily meaning anything from a technical point of view.
If an analog circuit is cut in half with the left side viewed as an output impedance and the right with an input impedance, my understanding is the max power possibly transferred is -3 db. I arrived at this by looking at some texts and thinking in terms of voltage dividers. The real design I have has a square wave input, and the Fourier transform (I believe) is therefore infinite. So matching the characteristics of the input transfer function to derive an output transfer function such that -3 db is achieved is no trivial accomplishment. I think that some simplification takes place when trying to discover the optimal values of the R, L, C network to best hit the -3 db target by neglecting the higher order terms. Again this is all intuition, and I realize not a strong technical argument. However I have several texts in front of me that I am reviewing further.
What is re, Rs, if by hfe you mean DC Current Gain (or Small-Signal Current Gain?). Also can you please elaborate on the meaning of 'ri=hfe.re'. Thanks.
No it wont. Matched impedances waste half the power.
Matched impedances can be of value in obtaining correct waveforms when driving transmission lines. That is when transmission line effects are important, i.e. when the rise/fall times are faster than the turn around delay time. Otherwise, matched resistances are, essentially irrelevant.
Of course, resister damping an inductor can prevent overshoot, but this is not referred to as matching impedances.
As I said, in most case, matching impedances (RL=RS) is irrelevant. Its the worse thing to do. Its throws away signal.
Yes. See above as to when these effects are important.
Only when that particular problem is of concern. When it isn't, and it usefully isn't, matched impedances are poor design practise.
Yes, but this point is, for the most part, useless information. For example, an audio power amplifier is designed to have a low impedance output, ideally, < 10 mohms. This is to obtain, in part, a flat frequency reponse from the speaker. An output impedance equal to the nominal sppeaker impedance, say, 4ohms, would have very large frequency reponse errors.
The max *theoretical* power from a low impedance source , i.e. 50V at
10mohm would be huge. we don't care about the maximum available power in
*most* cases. Its just a number that has little relevance in most analogue design. We care about voltage gain, *output* power and efficiency etc.
Real square waves are finite in their BW use.
re is the intrinsic emiiter impedance that sets the gm of the device.
ic = gm.vi
That is, the small signal output current is given by gm times the small signal input voltage.
gm = 40IC, where IC is the DC bias current.
ri is input resistance. Rs is the source resistance. hfe is the small signal current gain.
Its all here
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Kevin Aylward snipped-for-privacy@anasoft.co.uk
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SuperSpice, a very affordable Mixed-Mode Windows Simulator with Schematic Capture, Waveform Display, FFT's and Filter Design.
What sort of rise and fall times are you dealing with? What sort of trace lengths are you dealing with?
Matched impedance, as stated by others, is lunacy unless you have signal fidelity issues due to reflections. If you have long trace lengths compared to transition times, then it's helpful to use impedance matching of some sort. Page thru a copy of "High-Speed Digital Design, a Handbook of Black Magic" by Howard Johnson. He gives criteria and shows how to terminate transmission lines for various scenarios. Don't be fooled by "Digital" in the title. Most of the content is in the analog realm.
I am trying to reconcile my understanding with your statement. How are real sq waves finite in their BW use? This is important because I thought the impedance for R, L, C networks changes for different input signals?
Looking at sq wave Fourier derivations, it seems that the Fourier Series of a square wave is appox sin(x) + (1/3)sin(3x) + (1/5)sin(5x) + .... [ref google]. From Wolfram's math site I found the derivation as follows. "The Fourier series for the square wave with period 2L, phase offset 0, and half-amplitude 1 is therefore,
f(x) = (4/pi) * sum from n=1,3,5... to infinity of 1/n (sin (n * pi * x / L))"
If frequency is 100 kHz, then period is 10 u sec (T = 1/f). Solving for L, to use in the above formula yields:
2L = 10us => L=5 us.
It would seem to imply that f(x) = (4/pi) * sin (pi * x / 5) + (4/pi) *
1/3 * sin ( 3 * pi * x / 5) + ...
As an approximation, I see that the series converges, thus at some point the smaller signal contributions could be ignored. Looking at different derivation of the sq wave, it says it is a square function convolved with an infinite impulse train. The sinc function being the Fourier transform of a single 0 centered square (or ideal low pass filter) of length 2L. [Circuits, Signals and Systems, Siebert, pp 434], resulting in the main lobe around zero containing the highest dB contribution to the circuit response, and therefore the impedance value (unless I've gone awry). In real life, I am using a sq wave that begins at some time, then goes on for a while, then ends when the device is turned off.
For impedance, it appears I should strive to make Rload >> Rinternal, or Rinput >> Routput given a Thevenin equivalent circuit. [Art of Electronics, pp 12]. This prevents input signal attenuation based on the voltage divider relationship:
Vout = Vin * Rload / (Rload + Rinternal)
If Rload >> Rinternal, then Vout ~ Vin, meaning that the signal strength is retained despite the additional load. But as you wrote, ri=hfe.re (or as discussed in your paper approximately Ri=hfe.Re'), means that the input impedance is high, about 200 * (25 + 100) = 25 k. This would be OK if it is the Rload (and analog circuits were connected to transistors in this fashion) which is what I think you were saying, but how does it look if this is the source and I am connect an Rload? I think you state it's 5 ohms, or just re the small signal effective resistance, which is also good, but bad for the amp-speaker relationship you described earlier.
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