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Are you saying that they don't output EDIF?

The same ones who touted "System-C" as the savior of the planet?

has

I have enough work to do without "wacky". Most engineers are paid to keep the alligators at bay. I guess there is room for a couple of dreamers. ;-)

"Automotive" is a funny business, as I'm finding out. There are many parts that aren't available to the general public. Perhaps your customers have high enough volume to twist the manufacturer's arms to get them but I haven't, in the past.

Do now (changed jobs). Surprisingly, cost still isn't that much of an issue (yet).

time. :-(

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My problem is that I don't have a place to work. My tools are spread from the garage to the attic. Hopefully that'll be fixed sometime soon (hopefully, I'll add a basement ;-).

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I don't know. What I do know is that I was told that a switch from one to the other is a major endeavor and one may have to use conversion services to get that done. So even if the format was called "EDIF", what good does that do?

Quote "EDIF (Electronic Design Interchange Format) is a vendor-neutral ^^^^^^^^^^^^^^ format in which to store Electronic netlists and schematics"

I guess this must have fizzled.

take

Pretty much, and then a mouse was born :-)

magazines.

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I sometimes design stuff for mass markets where it's a dog-eat-dog world. If you can't deliver at 50c less someone else will. Believe it or not, I do enjoy such designs.

Bingo! But first you must hear about these parts and guess where I get to know about them :-)

A lot of times this is hidden in some comment such as " ... in order to achieve this precision XYZ Corporation provides an IC that ...".

If it were a real mass market or even just the size of, say, the low and mid range oscilloscope markets I'd be very afraid of Asian competitors. They often barge out of a gate that nobody knew was even there, and by then it's too late. I have a lot of respect for the engineers there. The only time I was beaten by a (friendly) competing engineer whose design came in about a buck less than mine was in Seoul, Korea.

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Luckily that's different here :-)

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Of course it is. Once again, EDIF is a netlist standard and not much more. You can't read a netlist in from Cadence into Cadence and see the pretty schematic, either. It's "lossy". ;-)

It *is* used for netlists. Apparently "schematic" interchange isn't important enough (and would severely cripple their market).

No, it *is* the standard interchange format for netlists. Chip makers use EDIF as their input.

take

Except I smelled the rat. ;-)

CAD

;-)

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I have disties for that. ...and they pick up the lunch tab. ;-)

It's not. It's a large Asian company (earlier you whacked the "Zuken" nail). ;-)

time. :-(

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The problem is that basements are incredibly rare around here (only one house of the many dozens we looked at had one). We're likely to move 75mi, or so, North and it's uncommon not to have a basement there. Such a difference in a short distance is really strange.

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It was originally claimed to do schematics, too. But I guess the whole effort was watered down. I can almost picture how that happened, Perrier on white table linen ... :-)

To input what into what? If EDIF merely does a netlist and it's not even compatible between manufacturers, well, then it ain't worth writing home about.

high

They will not be very useful because they won't bother you with chips for automotive, telco, cable modems, fiberoptics, radio, TV, video games and so on. They'll try to pitch the latest comms and RF stuff to you. So you'll miss out on some of the gems in those other markets because the rep can't be "in your circuits" all the time. And most likely he or she ain't a seasoned design engineer so they can't.

Then there is the line card problem. They only peddle their wares. Yet some of the gems I found were from companies off the beaten paths, like some little outfit in Taiwan or Japan. Yes, I do occasionally read Asian magazines, for that reason.

Ok, if it's not a mass market you may be fine. As long as the Asians do not want a piece of that pie.

time. :-(

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What? Moving again? I hate moving. Have done it a few times, including across a major pond. In the end it doesn't matter much whether its 7500 miles or 75 miles, it's a pain.

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EDIF,

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Their chip design process.

You don't think chip vendors need netlists as inputs?

high

With the potential of sales in the millions (pick your units), they seem to come across. Time will tell.

More lunches! ;-) I'm not so good a hieroglyphs.

Define "mass market".

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Yep. Up nearer the big city. It is a pain, but it'll be a lot easier than it was moving from VT (but not easier than from OH, since it was an apartment and almost everything was still packed). At least I don't have all that much to throw away this time. ;-) ...and I'll probably have a lot more time to do it. Who knows, it may be years before I can sell the house. :-(

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EDIF,

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It's a shame there's not a universal schematic file format.

John

important

You mean from schematic to layout? If it's not an integrated suite you need a netlist for that. But who cares about the format? I generate lots of netlists for layouters and I just pick the format they want. What for did the world need EDIF committee meetings and all that?

No, manufacturers need GDS-II.

high

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Eventually, yes. But in the world of electronics he who conceives and executes the idea first generally wins. In medical it can be even tougher. If a team doesn't make the big relevant trade show they are toast.

I can't do that, it would pack onto my belly rather quickly :-)

issue

Production volumes of several thousand a month, over many years.

Some of that will depend on how the elections go. Meantime, hopefully you can find honest renters who won't trash the place.

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EDIF,

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And that's exactly the problem with EDIF. It was not wanted by the big manufacturers. Good old turf protection.

important

Certainly.

Chip makers need to take input from a number of tools. They have to have a standardized format. EDIF is that format.

Only if you're designing the transistors too, I suppose. Most chip design is standard-cell and all that's needed is a netlist. The shapes are defined by the chip vendor.

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That's true in many businesses. If you can't "make" the trade show deadlines, fake it! An empty box with blinking LEDs has been used as a product demo more than once.

There is that problem. ;-). A couple of weeks ago it was Thai. Not sure I'd go back on my own dime.

issue

nail).

house

I'll stay, or at least my wife will, until we sell. She still has a job down here. It's close enough to commute on the weekends. Sucks, but it's better than nothing.

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EDIF,

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Why would EDA companies want that?

important

That's not a lot of achievement. In the world of discretes the unspoken standard is the PADS netlist. Just about everyone can read that. But they didn't need lofty press releases and meetings in posh hotels to get there. They just did it.

None of my chips ever was that way. Always full custom. Ok, with the exception of SRAM cells on the current design but that's a mere housekeeping function, just like nobody makes their own potato chips from scratch anymore.

On our chips, if the layouter does not fully understand the schematic he or she is almost guaranteed to screw up, or it'll all unravel at parasitic extraction.

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Not gonna happen in medical. They all hire (very good-looking ...) models as ultrasound scan objects. Doctors are invited to test-drive the ultrasound systems right there at the show, right in front of dozens of other doctors. Of course, certain areas of the body are off-limits :-)

Anyhow, you better have _all_ ducks in a row by then. An ever so faint noise line in the Doppler-FFT can give your company such a ding that the VP of sales will go ballistic. Engineering will have a greatly increased "visibility" after something like that, but in the Dilbert sense.

Our ethnic restaurants are decently priced. You can eat a nice Japanese lunch for two with two large mugs of Hefeweisen from tap for a grand total of $23 plus a nice tip.

important

I've never seen PADS as being somehow a "standard". Does Cadence read it?

No one ever said you were normal. ;-) The fact is that damned close to 100% of the chip design is standard cell and the rest is only semi-custom. Well, if you're talking about ten transistors, maybe not. Even semi-custom designs only vary the transistor sizes. Designing your own shapes is a rarity anymore.

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Reduces the number of fake images needed. ;-)

I'm just not much into ethnic food. It wasn't bad, by any means, just not my thing. I don't drink anymore and when I did, it was only after the day was done and I didn't even plan on doing anything at home. One beer and it's procrastination time.

important

use

Orcad Layout does. But it doesn't matter, good schematic capture programs can generate lots of netlist formats and with scripting you can yet create more. So far all the layouters I dealt with were fine with the usual netlist. One used Eagle and since that's also my CAD there was no need at all for a netlist. With integrated CAD suites netlists are more a blast from the past.

I really don't know what's so special about a netlist format.

I am talking about thousands of transistors here. Standard cell is digital turf, cutting edge analog can't be done that way. This kind of stuff:

No need to read all that, but there's five ICs in that li'l thingie next to the penny, for a total of 64 wideband analog channels, amps, pulsers and so on. This one is over 10 years old when we didn't have the processes we can have today. Yet to this day nobody was able to even copy it. And it's not that people haven't tried.

I bet Arizona-Jim hardly ever uses standard cells either.

I'd

I grew up in Germany and beer does not make me tired or drowsy. It's considered basic nutrition over there :-)

The one that did give me a buzz was after the Christmas service at home is from Belgium. It's called "Delirium Noel", and they mean it:

important

The Brat has a contract PCB layout job for a company in Fremont, to modify a board. The schematic was done in India, and is rev G. The PCB was done in the Netherlands, and is rev D. Of course, nothing matches up.

I've been explaining to her, this isn't all that ususual.

John

For a second I thought that was ... but must be a different one. Rev levels between PCB and ASSY are often different. But they should not be different between ASSY and schematic.

Yep, after a while one gets used to a certain level of chaos and then to methods on how to untangle things :-)

is

No, somebody else.

but must be a different one. Rev

None of the reference designators line up. And some of the parts are different. So they hire a pcb layout contractor to turn the mess over to!

We keep all our revs together: schematic, bare board, assembled board. And the netlists must match before we release a document package.

Rev G implies that something was wrong with A, B, C, D, E, and F.

I'm guessing there will be something wrong with G, H, and so on. Multinationalism at work, I suppose.

John

is

by

If you do one-offs and such that is possible. For something in larger qties that is produced over a decade or two, not so much. I am right now looking at a case where parts are left off on a Rev B assy. But there is no change required on the bare board, so that remains Rev A. This is why I always instruct layouters to "etch" the Rev for the bare PCB but provide a "white board" field for the assy rev level. Usually a white or yellow filled silk screen square. So all my boards contain two part numbers with two rev levels, and after a few years the rev levels become different.

This all gets properly ECO'd and such, so there is total trackability. The Federales would read us the riot act if there wasn't.

Or rookies at work, unless this is a very old design. We usually do informal revs X1, X2, X3 and so on until engineering is done with the board, then it goes to rev A which is entered into the ECO process. X-revs also have paperwork that gets archived but less formal. Must be done in many of my fields in order to have a seamless design history.

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We do that for everything.

For something in larger

We etch the PCB rev, and silkscreen the assy rev, which are always the same.

Usually a white or

Some people do that, spin the rev of a physical board after it's assembled, by applying an ECO or something. We don't.

We start with a fully released rev A, and manufacturing builds some, with the expectation that we can sell them. Usually we can.

John

So what do you do with all the rev A bare boards that now (at least legally) can't be used anymore because that would violate your procedure? Cut them up when rev B rolls around and make coasters out of them? :-)

Seriously, I've been around the block for 25 years now and even with dozens of clients over the years I have never seen a company that required rev level lockstep between bare board and assembly.