Xilinx Synchronous FIFOs

Hello,

I have been looking at my FIFO designs and considering if they are backward compatible from Virtex4 to Spartan.

I have been using the FWFT First_Word_Fall_Through feature on the Virtex4 and when I compared waveforms of this with those from a CoreGen FIFO got different results. I am still using ISE 7.1.04 and the CoreGen models were Version 5.

I did not see any FWFT switches on my CoreGen wizard. Are there any FWFT features in ISE 8.2?

Also it seemed that without the FWFT feature, the Virtex4 FIFO required 4 clock cycles from the wr_en to the rd_en signals, while the CoreGen and the Virtex4 FIFO with FWFT on requires only 3.

Brad Smallridge brad at AiVision dot com

Reply to
Brad Smallridge
Loading thread data ...

Yes.

Reply to
Andrew Holme

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.