Hi,
I'm a systems engineer and not the direct FPGA guy, but I'm fairly involved in the implementation of my DSP algorithm on our Virtex-II platform. Our current code uses the 2's complement block IP core. Today, when I went searching on the Xilinx site to refresh my memory on how it works (we did the initial coding 3+ years ago), I couldn't find it anywhere! Did it get replaced by something else, or should I just use the numeric package to convert to that format?
Thanks,
Marty
I've lost track of how many times I've searched for something on Xilinx's website that I *knew* was there without ever finding it. Most likely it still exists. It may not show up in the tool (by default) if it's deprecated.
-- Ben Jackson AD7GD http://www.ben.com/
You hit the nail right on the head Ben,
As of at least 9.1, the twos complementer is still in CORE Generator, but it has been deprecated for a while. To make it show up, select "All Versions incl. Obsolete" in the Show pull down menu in the tool bar at the top of the CORE Generator window.
Regards,
John McCaskill,
Yes, ieee.numeric_std.unsigned would do the job.
-- Mike Treseler
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