Hi All,
I am in search of some good references on FPGA implementation of Order-Statistic CFAR (constant false alarm rate) detector in radars.
If anyone has any idea or information, please send-in the references. Thanx in advance.
You might already be aware of these, but in case your not:
Hu GuoRong Han LiTing Han YueQiu Mao ErKe Dept. of Electron. Eng., Beijing Inst. of Technol. , China; This paper appears in: ASIC, 1996. 2nd International Conference on
Programming and development environments for configurable computing systems Kumar, S. Bhatt, D. Vestal, S. Wren, B. Shackleton, J. Shirley, H. Bhatt, R. Golusky, J. Vojta, M. Nanavati, C. Zumsteg, P. Symosek, P. Crago, S. Schott, B. Parker, R. Gardner, G. Honeywell Technol. Center, Minneapolis, MN, USA; This paper appears in: Aerospace Conference Proceedings, 2000 IEEE
?Design and Implementation of a CFAR Processor for Target Detection? César Torres-Huitzil, Rene Cumplido-Parra, Santos López-Estrada, 14t International Conference on Field Programmable Logic, FPL04. Antwerp , August 2004. Lectures Notes on Cumputer Science Vol. 3203, pp
943-947. ISBN 3540229892?On the Implementation of an efficient FPGA-based CFAR Processor fo Target Detection?, Rene Cumplido, César Torres, Santos López. 1s International Conference on electrical and Electronics Engineering Acapulco, México. September 2004. IEEE Catalog number: 04EX865C ISBN: 0-7803-8532-2
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