My application needs a somewhat large memory array, for constant (every clock cycle) sequential read/write access -- the size in question is exactly 64KB (524288 bits).
Is a memory block of this size reasonable / possible to do in just VHDL? My FPGA in question is a Spartan-3E, and we have not yet decided upon the exact package yet.
If this task is not feasible in VHDL alone, what external RAM device might be recommended? Having the VHDL for access to such an external RAM available for reference would be a big boon here.
A side note on how this memory block will be used. One "task" will be iterating over the block repeatedly, with data trickling in replacing old values -- so each incoming byte stored in the RAM will be accessed many times before it is overwritten.
Any tips or links to materials regarding this would be greatly appreciated.
Thank you.
Alex McHale