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Cool test bench generator for testing some devices which describe by Verilog or VHDL

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I always get an error window with 'File :Not Exist' when I try to load a source file.

Nial.

Reply to
Nial Stewart

I download this program. This program generates tbench for inout port too. Interface and help is very good.

Reply to
vladimir

Try download it else.

Reply to
vladimir

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