Hello, everyone! I am trying to adapt Spartan 3 Starter Kit board as a standalone board for one of my projects. To download configuration to FPGA I want to use 6 pin serial JTAG. My question is: are there any strict specifications for the line driver that drives TDO line back to the PC? Any links addressing this issue would be very welcome!
TMS, TCK, TDI lines are driven by drivers inside the Xilinx parallel cable (which take the power from PC parallel port). They are Schmitt trigger type and quite fast: NL37WZ17 I was wondering if the TDO line buffer/driver needs to adhere to similar specifications? The board is to operate @ 3V.
Thank you!