Book recommendation

How much do you know about digital design already? A good VHDL book isn't going to tell you much about digital design -- it's going to tell you how, after you know what you want, you can translate that desire into VHDL. So if your first problem is that you have no clue what a DDS, a quadrature encoder interface, and those other digital circuits should do, then your primary need is not a VHDL book.

If that's the case, then you want to look for a book with a title that's more along the line of "Digital Logic Design (with VHDL)"; i.e., you want a book about digital logic design that uses VHDL to convey the design content. This will fill in your most crying need, and hopefully give you enough VHDL chops to get you by.

The book on my shelf is the opposite. It's "The Designer's Guide to VHDL" by Peter Ashenden, and its meant for people who know digital design, but not VHDL.

Keep in mind, though, that I'm no VHDL expert, and the book was just the likeliest-looking one at Powell's when I went shopping. I'd look to it only if no one else coughs up a title. It proved adequate to what I was doing, but what I was doing was largely showing that an algorithm was feasible _at all_; once I had a first cut working the real FPGA designers on the project took it out of my hands and made it work with fewer gates and at a higher clock rate and all that good stuff.

Unless your prof is demanding that you do this with an FPGA, or unless you want to use an FPGA just because, you may want to consider implementing those functions on the microcontroller that you're interfacing with. I'm certainly not saying you definitely _should_ -- I've just found that it's often cheaper to pull moderate-speed "logic" functions into the micro, particularly if I'm at liberty to shop for the microprocessor I need (for instance: many micros these days are made specifically for motor control, and have quadrature encoder interfaces built in).

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com

e t

"

Tim,

Thanks for quick answer. I've 12 years of experience in electronics design. So I able to do digital design and I know a little of VHDL. What I need is a book that teaches me the best way to make the project. I need to learn h ow to "...make it work with fewer gates and at a higher clock rate and all that good stuff."

Paulo.

Since I haven't used VHDL before, I /am/ interested in pointers to VHDL "style guides", by which I mean: - coding patterns and anti-patterns - clean directory tree structures for libraries and packages - anything else that helps me avoid messy pitfalls I have seen a few such style guides around, but none of them are really satisfying!

I have more years electronic experience than I care to recall, so I'll figure out ways to condense logic and speed up logic (in my experience each device manufacturer tends to produce good info about their devices).

(snip)

For FPGAs logic optimization is a little different from the TTL days. For one, any four intput (or, now, 6 input) one output logic block can be implemented in an LUT. More important for speed and high clock rates is pipelining, also because FPGAs have FFs on each LUT output. (At least many do.)

There used to be books on the architecture of pipelined computers, from the days of the IBM 360/91 and Cray-1. Some of the ideas still work, and some don't.

The optimizations that the synthesis tools do make it hard to know which things you need to know and which you don't.

I don't know of any books on optimization for FPGAs, but that doesn't mean that there aren't any.

-- glen

I'm with Tim on this - use a micro if you can.

I've found all books on VHDL or Verilog to be deeply disappointing. The best/quickest way to get started in a goodish direction is to go on a course but it's not cheap.

I've been using VHDL for years (started with a 1 week course by Esperan who don't exist any more.) The only book I have which I would even slightly recommend is VHDL 2008 Just the New Stuff by Ashenden and Lewis. It's NOT a book to start with.

If you have to do it all on your own trawl the web - there is a lot of "very first step" stuff and quite a lot of useful more advanced material but it can be hard sorting the good from the bad. At least it's free.

(The last Verilog book I bought was over £100 and its just trash.)

BTW if you are at Uni aren't they meant to TEACH you the basic stuff ?

Good luck !

Michael Kellett

I have been programming FPGA with VHDL for some years now. I came from high

-speed full-custom and digital standard cell semiconductor design with cade nce and that was 100% schematic capture.

I have two books: FPGA prototyping by VHDL examples, by Pong P. Chu Circuit Design with VHDL, by Volnei A. Pedroni.

Both books gave me a good introduction to the procedure of mapping somethin g structural (schematic, block diagram) into something behavioural (RTL, FS M), and at the same time cover something I knew, real hardware.

Chu is using Xilinx and Pedroni seems agnostic.

Chu has a short tutorial on a Xilinx project to get started with the toolch ain, and Pedroni has tutorials for Xilinx and Altera. I didn't follow any o f these tutorials as I pretty much understood the FPGA tools by previous to ol experience.

You can have a peek into both books at google books.

Pedroni has a lot of examples on how to use types, both working examples an d examples which will not work. That's the section I use most nowadays.

Other than that, Xilinx has some documents on coding style, both for esthet ics and for speed. Google for "xilinx coding guidelines" as they are hidden in obscure places.

The switch from schematic structural thinking to VHDL behavioural thinking sometimes lead to horrible code. The above books helped me through that per iod, specially regarding use of clock enable instead of gated clocks and av oid inferring unwanted latches. Just remember to replace the clk'event and clk='1' with the modern rising_edge(clk) in the textbook examples.

The biggest hurdle was to accept that the synthesizer could do a better job than me and stop being too clever during design.

--
Svenn

..

they are still alive and kicking...

Hans

Well so they are - I was sure they'd gone. Perhaps I'll ask them about their Verilog for VHDL users course.

Michael Kellett

Thanks for all replies. I will read some articles and look into some open source IP cores (for learning, not for plagiarize). I decided to use FPGA because I need 4 channels QEI, 4 channels DDS and another small logic.

-- Paulo

Thanks, I'll have a look.

I'm sure I'll figure out the toolchain basics fairly quickly, but I'm less convinced about the subtleties. I'm hoping

100 power tips for fpga designers" by Evgeni Stavinov will give me some clues.

I've tried "xilinx style guide", but that's a useful alternative term.

Not concerned about avoiding that trap :)

...but that trap is more subtle :(

I've read there are subtle differences, but I've forgotten what they are! "rising_edge(clk)" is terser.

I haven't of course, calibrated my definition of "too clever". My current presumption is that I'll use behavioural code except where I've decided I need a specific "high level" primitive provided by the device manufacturer.

(snip)

I mostly write structural verilog, though behavioral for FFs (the only way I know) and usually behavioral for state machines.

Yes, this one I agree with. Though they don't find everything, there are many cases where they can do well with more obvious, and not so efficient looking, code.

-- glen