newbie: FIFOs in C for DSP

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hi,

im a newbie in DSP and embedded programming and i've some doubts that
i hope some of you could kindly answer.

i've to do some profiling between DSP and ASIC/FPGA solutions. Im a
FPGA guy so im lost with this DSP thing.

1)
i'd like to know what do you think about the code i wrote, cause i
feel it's not very "DSP optimized". I need to implement some sort of
shiftregister or FIFO, because im to calculate a correlation, so
here's how i do it. (like i'd do in vhdl...)

the input coming from an ADC is 10bits wide, so it'll be stored in a
"short"

#include....

#define FifoSize(x) (x+1)

// FIFO declarations
short FifoN[FifoSize(gN)];
short *FifoN_ptr_write = &FifoN[0];
short *FifoN_ptr_read = &FifoN[1];
short *FifoN_end_ptr = &FifoN[gN];

short input;
int multN;

// check for the end of FIFO (write), if yes, then wrap around
if (FifoN_ptr_write == FifoN_end_ptr)
{
     FifoN_ptr_write = &FifoN[0];
}

// write to the FIFO
*(FifoN_ptr_write++) = input;
    
// check for the end of FIFO (read), if yes, then wrap around
if (FifoN_ptr_read == FifoN_end_ptr)
  {
    FifoN_ptr_read = &FifoN[0];
  }

// calculate input * FIFO_output
multN = input * (*FifoN_ptr_read++)

....

EchR = EchR + multN - (*FifoD1_ptr_read++);


is this the best way to do it? or there's a better way to implement
the FIFOs?
should i "fix" for 20bits discarding the first 12? (i guess that's not
necesary)
will memory used by the FIFO be effectivelly stored in the cache?
can i use three operands at the right of the equal? or should i split
the expression?

2)
how about the ADC doing a DMA transfer to RAM and then the DSP reading
a whole chunk of data while the ADC performs the next DMA? it is
possible i guess.

3)
are there online tutorials or coding style guideliness for C for DSP?

thanks in advance

Re: newbie: FIFOs in C for DSP
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yeah, that's what i thought too, but TI's documentation talks wonders
about their optimizing compiler, and till now i havent been able to
find as much assembly examples as in C.
but to use the "circular addressing" mode i'd need to write in
assembly, as C the compiler cant understand that im modelling a
circular buffer and there are no C templates or callable library
functions to do it (but i havent gone thru all the docs yet, the
Instruction Set and CPU guide is 635pages!)

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well TI's c6713 has it embedded

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well, the profiling im doing is to see if a DSP could be used instead
of a ASIC/FPGA solution, but so far no luck, the DSP is slow compared
to the FPGA. It is more precise cause it's a FP DSP, but im guessing
(like i always thought) that it cant match the FPGA. Im doing baseband
processing at about 100MSPS(mega samples per second) and i dont see
how could i fit all the processing i need to, with only
225MHz*818%00MIPS


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seems like you're right :)

Re: newbie: FIFOs in C for DSP

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My experience with Code Composter for the 'F28xx chip is that the
optimizer is very good with "standard" code, but it is simply incapable
of recognizing opportunities to use circular buffers, the MAC, and all
that other stuff that makes a DSP more than just a really good processor.
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So there's a few hundred more pages to study!  :)
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You should have said so.  At 100MSPS you need an FPGA, for sure (or
enough DSPs in a fancy enough configuration that a Vertex II Pro as
large as your hand is looking inexpensive and small).  If you know your
data ranges beforehand you shouldn't need floating point.

You may want to consider using an FPGA front-end with a DSP behind it.
I've done this where the FPGA does high-rate sampling and decimation,
then the DSP took over at about 10KSPS (that was a few years ago, the
product is being replaced by DSP's that sample directly at 50KSPS).
Done right this will allow you to use a cheaper FPGA, and debugging DSP
code is generally easier than debugging FPGAs.
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--

Tim Wescott
Wescott Design Services
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Re: newbie: FIFOs in C for DSP
 
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exactly, maybe TI should give some macros or templates to use them so
that later the compiler could recognize them (so far i havent found
those macros if they exist)


 
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yeah :), is it me or TI's datasheets are different from other
manufacturers?
i was used to read datasheets from several other semiconductor
manufacturers and they seemed to have the same layout, but im kinda
lost with TI's ones, maybe im just getting old :)

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using FP will improve the precision 'cause we do plenty of divisions,
that's the whole idea of using a DSP, dont ask me, i was happy in my
ASIC world :) after all, if they use DSP where would i work? :)

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yeah, specially when it comes to "hard" bugs in ASIC :)
by the way, i cant do anything to the incoming data, so i need to
process it at 100MSPS.

anyways i guess my report will say i wont recommend the use of DSP

thanks everybody for your answers

Re: newbie: FIFOs in C for DSP

   ...

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32-bit fixed point has 31 bits of precision plus sign. 32-bit floating
point has 24 bits of precision. 7 bits are traded away for extra range.
If you know the range of your data and construct accordingly, you don't
have to make that trade.

   ...

Jerry
--
Engineering is the art of making what you want from things you can get.
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Re: newbie: FIFOs in C for DSP
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plus sign also.  (At least the standard IEEE floating-point.)

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Re: newbie: FIFOs in C for DSP
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Implicit 1 bit buys place for the sign bit

Jerry
--
Engineering is the art of making what you want from things you can get.
ŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻ


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