hi,
im a newbie in DSP and embedded programming and i've some doubts that i hope some of you could kindly answer.
i've to do some profiling between DSP and ASIC/FPGA solutions. Im a FPGA guy so im lost with this DSP thing.
1) i'd like to know what do you think about the code i wrote, cause i feel it's not very "DSP optimized". I need to implement some sort of shiftregister or FIFO, because im to calculate a correlation, so here's how i do it. (like i'd do in vhdl...)the input coming from an ADC is 10bits wide, so it'll be stored in a "short"
#include....
#define FifoSize(x) (x+1)
// FIFO declarations short FifoN[FifoSize(gN)]; short *FifoN_ptr_write = &FifoN[0]; short *FifoN_ptr_read = &FifoN[1]; short *FifoN_end_ptr = &FifoN[gN];
short input; int multN;
// check for the end of FIFO (write), if yes, then wrap around if (FifoN_ptr_write == FifoN_end_ptr) { FifoN_ptr_write = &FifoN[0]; }
// write to the FIFO
*(FifoN_ptr_write++) = input; // check for the end of FIFO (read), if yes, then wrap around if (FifoN_ptr_read == FifoN_end_ptr) { FifoN_ptr_read = &FifoN[0]; }// calculate input * FIFO_output multN = input * (*FifoN_ptr_read++)
....
EchR = EchR + multN - (*FifoD1_ptr_read++);
is this the best way to do it? or there's a better way to implement the FIFOs? should i "fix" for 20bits discarding the first 12? (i guess that's not necesary) will memory used by the FIFO be effectivelly stored in the cache? can i use three operands at the right of the equal? or should i split the expression?
2) how about the ADC doing a DMA transfer to RAM and then the DSP reading a whole chunk of data while the ADC performs the next DMA? it is possible i guess.3) are there online tutorials or coding style guideliness for C for DSP?