CMOS design rules

It's good practice.

Yes. The impedance of a single pin looks much like an open circuit. A single 10K resistor for pull-ups will suffice. For pull-downs, you can wire straight to ground. OTOH, if you're designing something that will go to etch, it is often a useful idea to use separate resistors for each pulled pin (high or low), as you can then press those inputs into service as driven pins without any trace cutting, or even removing the resistors.

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Bill
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Cmos is a high impeadance input that can be tied directly to either sink or source without resistors, but the general design standard is to use a single resistor to vcc as a "rail tie" for all high ties.

resistors?

Why?????

I have seen many configuration pins on CPUs (also CMOS) directly tied to ground or VCC. Dip switches on microcontroller inputs (also CMOS) are often directly tied to ground. So what good does a resistor do?

Meindert

One reason it used to be recommended back in the old days (30 years ago, when 74C was new) was to fend off latch-up if there were multiple power lines involved.

The more practical reason, in my view, is simply to allow for those "oops" situations where easy access to another input term may save you from problems...

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Bill
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Most likely a hang over from ancient TTL practice.

74 series TTL has (had) an abs max supply voltage rating of 7v but an abs max input voltage rating of 5.5v. Tying inputs directly to VCC reduced maximum supply voltage tolerence by 1.5v. Tying with pull up resistors was supposed to protect the inputs from excessive VCC which would not otherwise kill the chip.

Unless the semis you are using have similar characteristics tying up or down with a single resitor is pretty pointless.

Tying with multiple resistors lets you force nodes during test and make modding PCBs easier.

hi/lo

often

1. Current limiting in case of power-supply glitches
2. Isolation from other inputs which if chips failed could become outputs If any outputs are used to drive inductive loads like relay coils, then spikes are a real possibility
3. Provide an easily accessed pad for circuit changes
4. Waste board space
5. Increase parts count and costs
6. Enrich resistor manufacturers. ...

Since I mostly design with TTL (and compatible) devices, I tend to use lots of resistors -- unless I'm wire-wrapping my own board in which case I'll use as few connections as possible.

Seriously, in an all-CMOS system there are probably very few reasons to use the resisitors for connecting unused inputs to supply rails.

Norm

You will have to ask those engineers who do so. Personally, with CMOS, I tie directly.

To make the board much, much harder to route. It's part of the PWB Layout Union's rules and is required by the PWB designer Full Employment Act of 1969 for all government contracts... :)

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On Sat, 10 Jul 2004 13:30:38 -0700, "Mike Turco" wrote in comp.arch.embedded:

You have had quite a few answers already, on both sides of the issue. With 74HC (but not 74HCT) it is not absolutely necessary as long as your power supply voltages will be fairly clean. And if they are too "unclean" you can have problems from the power supply pins anyway.

On the other hand, the standards for many manufacturing organizations these days prohibit directly connecting power pins to either logic supply. They require a resistor in the 1K to 10K range so that they can drive it to the opposite level in automated test fixtures.

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Clean? Unclean? You can tie CMOS logic inputs to power supply rails with no problems. The logic transistion levels are related to the supply rails in any case, and are always a fraction of them. The supply rail is the very best CMOS logic level 0 or 1 that you can get in a system without exceeding the supply rails.

With processor port pins, there is reason to use resistors if they can become outputs that could try to pull the pin to the opposite state (push-pull, or n-channel open-drain that is connected to the positive supply rail etc.). This could happen with severe electrical disruption (lightning strike, for example) and could possibly pull the supply rail down in some systems and cause malfunctions that continue after the disruption ends.

That could find faults such as the output of an unused gate shorted to the supply rail, I suppose, but there must be few reasons for testing a logic state which never occurs in normal operation.

Best regards, Spehro Pefhany

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It allows for very dumb testing (which seems popular among test engineers).

If you can force every pin of a chip then you can call a standard library function to test a chip of that type. Functionally testing a chip which is usually brand new and just soldered into the PCB seems a bit pointless to me but it does check that the right type of chip is in the hole i suppose.

I disagree. I sometimes design systems where if the system fails somebody (often a lot of somebodies) dies. If there is an unused gate that doesn't work, I want to find it in test and replace that chip; I don't trust it to not have other problems.

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Guy Macon, Electronics Engineer & Project Manager for hire. 
Remember Doc Brown from the _Back to the Future_ movies? Do you 
have an "impossible" engineering project that only someone like 
Doc Brown can solve?  My resume is at http://www.guymacon.com/

Do you reckon that the possibility of finding that the gate input that you're not using has failed between component test and assembly test, and that will later result in a meaningful failure, is higher than the reliability hit caused by adding two additional solder joints and an additional component, the failure of any of which will likely cause an

*intermittent* failure of the system?

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward"
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Embedded software/hardware/analog  Info for designers:  http://www.speff.com

I actually wrote a paragraph saying pretty much what you just wrote but deleted it because it seemed like talking down to the audience, assuming that the reader can't figure out failure probabilities.

I disagree with "few reasons for testing a logic state which never occurs in normal operation." I think that there are many good reasons for doing that.

On the subject of what cost (in dollars or reliability) I am willing to pay to make the test possible, the answer is "not miuch." The chances of finding a bad gate are small and the chances of a bad gate causing problems with other gates in the package that the other tests cannot find are also small. The counterargument is that a failure in the solder joints is also small, and is unlikely to cause a system failure in most circuits.

Isn't (small^2)