I was told the other day that there are no right angle traces on PCBs (the traces go to something like 45 degrees between perpendicular traces) because of something to do with something or other. Could something please explain this or point me to some resources so I can book up.
There used to be a significant undercutting issue in right angle bends. This could be reduced by mettal filling unused areas or by avoiding right angle bends or both. In modern board processing, I rarely see undercutting anywhere. BTW, the same difficulty exists in some IC processes and metal fill is used to reduce the problem.
Chuck
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Chuck Simmons chrlsim@webaccess.net
AFAIK the only place where fill patterns are used in ICs is in chem-mech polish. The issue there is that the polishing rate depends on the composition of the surface, so you can get dishing (overpolishing) of some areas.
I had to use fill patterns in making silicon-on-insulator optical waveguides, where the issue was the different polishing rates of Si and SiO2, but the same approach can be used on metal layers.
IC lithography has issues with the wavelength of the light. There's a whole discipline called computational lithography that is aimed at pre-adjusting the mask pattern so that what you print is what you wanted. It's quite a subtle business.
The classical layout method was streets and avenues (chips are still done this way) on separate planes. For dense wiring, I don't think you can do better.
Nah, it's because when the electrons encounter the square corner, they can't make the sharp turn, so they spill off the end, much like the bend in the Minnesota River causes flooding every year at the bend near Mankato.
This is not true. The photo-resist process has a minimum "spot" size and that spot is the smallest radii one will ever find on the inside edge of any trace, even at obtuse angles. It varies with the equipment used from one PCB maker to another, but it is all pretty much laser etched now, so all similarly a small spot size. It is STILL there though.
There are also electrical reasons.
We never taped up at 4X with such traces either.
It isn't mere "style". There is a reason that ANY viable EDA layout software "makes sorta soft corners anyway".
Of course it can be done using fills, pours, etc. Note how a regular trace resists your stupidity, however.
Taking a close look at a modern motherboard, where one assumes those engineers are versed with things like timings and reflections, etc., one notes where they have a couple inches of trace laid down in scrunched-up fashion, in a a way of taking up "electron travel time", one will see that they NEVER use zig-zag traces, which would allow a tighter packing-in of a longer length of trace into a smaller area, using up less PCB area, which is prime real estate in this realm. NOTE that they NEVER do that. THEY ALWAYS use smooth, rounded switchbacks to take up the trace length desired.
"Memory routing" does pack better with 45 degree traces. It should be obvious when right angle traces, or any angle traces, don't pack well. But there is rarely an electrical reason to avoid right angles. The PC board houses will etch anything you want.
A sharp corner can burn up your printed circuit board!
Many of the electrons will miss the turn.
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That is unrealistic. Anyone could see that the function of the bus bar would be compromised.
They are typically (those in equipment racks) about an inch wide by
5/16" to 9/16" thick, and NONE of those I have ever spec'd or seen had holes bigger than 1/4-20 in them, with most using the rack standard #10-32 or even smaller.
There are, of course, bigger sticks available, but not many racks can even be stuffed with so much loading that the fault bus bar would need to be bigger than these.
Anyway, the point is that I have never seen a hole that big in ANY bus bar, so the realistic 'test' would be realistic holes, and bump up the amperage to show (simulate) the realistic flows around such a 'choke point'.
Really? The corner has less net resistance than the straight parts.
ftp://jjlarkin.lmi.net/Strip%20Resistivity.gif
So, does a right angle get hotter than the rest of the trace? I'm not sure. It will also depend on the width/thickness ratio of the copper, which determines heat spreading, and the TC of the copper itself, a positive feedback factor. Messy.
"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...
RMS counts for current waveforms /and/ current densities. If the current density is unevenly distributed, the power dissipation will be higher than the total current flow would suggest. This is the spacial version of RMS-over-time, where the power dissipation of a pulsed waveform will be higher than the average would suggest.
Of course, this will be reflected in the resistance. The average path through your right-angle strip might be naively estimated as 18.500, but the formula shows 18.559, which is slightly higher, suggesting the current is indeed uneven as Don's simulation shows.
This is quite important in my job. Say you want to induction heat a copper billet for forging. When it's cold, you get the same skin depth, current density and power density in the work coil as in the billet, so you get no better than 50% efficiency. But we know how to get >90%.
Tim
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The power dissipation is I^2*R for any chunk of copper you care to select. So the square corner zone dissipates less power than an equivalent square of the main trace. Within that corner, there is nonuniform heating, but whether that is a problem or not is a more complex issue.
Of course the current density is uneven. But does that make trace heating a hazard? Peak copper temperature is the real issue.
"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...
No, the inside corner has higher current density, so it dissipates a higher power density than any other point along the trace shown. Averaged over the area of the corner (w * y), the power dissipation (W / m^2) is slightly higher than that of the rest of the trace.
Most likely not a problem since copper is a wonderful conductor and dissipates heat quickly. If you used thin copper, it wouldn't spread out so well. With too much current through a wide, light weight trace, you will definitely see the inside corner burn first. As usual, it all comes down to proper engineering.
Tim
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Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
They do not rate them at any more than the cross sectional area of the thinnest passage then.
Stupid, really.
We get them with arrays of holes, and none of them are so large that they compromise the ampacity of the main body of the bar to the degree that one must figure it in.
You obviously did not read me response then.
Why do you continually insist on being so Always an Immature Little Bitch?
Go bark your immature stupidity elsewhere, Johnny.
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