RF transistors for PD cascode

Hmm all the Jfets are going away too. Is it silly to think of making a bootstrap with an opamp.

GH

Any fast cascode is going to need some keep-alive current in the transistor. Well, unless you will always have some minimum light level. Given some added fake-photodiode current into the cascode transistor, and a DC coupled system, that current needs to be subtracted out somewhere, which has its own problems.

You can also build a second, dummy cascode running at the same idle current, and subtract that out later. I have a schematic for that somewhere.

An emitter-to-emitter PNP-NPN dual cascode would be interesting too. Tricky to bias.

Well some DC offset at the highest gains might be OK... maybe 100nA. (If you care you can measure the no-light offset.) According to Hobbs I need something that still has decent frequency response at low current.

There's a nice graph in AoE3 fig 8.85, but no data below 100uA.

I'm looking for simple.

George H.

Phil says to not do that: too noisy. But OK if a little extra noise doesn't matter.

There are still some fast NPNs and some JFETS around.

Could you bootstrap from the output of the TIA?

Yeah well this is replacing a 'standard' TIA, which is noisy as hell.

Name one or two please.

Hmm just invert the output. The bootstrap would only be as fast as the TIA... but that might not matter. I'll try it and see.

George H.

Did you try boostrapping the PD?

--
 Thanks, 
    - Win

We also discuss it in section 8.11.10, along with the neccesity of maintaining sufficient transistor fT, which is why you have to add current.

At low currents you can extrapolate down to below 10uA, by eyeballing the constant C-pi curves. The graphs, Table 8.1, and Figure 8.39, can help you pick a good low-capacitance transistor for use at low currents. x-Chapters section 2x.11 has more detail and graphs.

--
 Thanks, 
    - Win

Well just now, (an opamp bootstrap) It does help a lot at low light level. (The speed is only a bit better? ~300ns rise time to ~200ns)

GH

Op-amp arggh, you need sub nV, you need a BF862 or a CPH3910. Would you like me to send you some BF862 JFETs?

--
 Thanks, 
    - Win

Right, that's very nice too.

OK I guess I didn't read the text. :^)

Thanks, George H.

No, but thanks. (I can't use an obsolete part.) I added the cph3910 to my DK order.

The opamp is a opa2192 ~5nV/rtHz of noise. With the cascode thing in place there is much less noise gain from the TIA amp, right? And then the noise will mostly dominated by the feedback R. Well I haven't sat dwon and tried to calculate the noise. (I also have to clean up the bias supply before trying to measure it.)

George H.

George, tidbits of info without full information are useless for giving advice. In addition to the opamp type, we need to know Rf, Cd and Cin, and your desired bandwidth. If you study section 8.11, you'll see all these parameters put to use in analyzing the TIA's performance.

--
 Thanks, 
    - Win

One point should be made, when looking for ways to reduce high-frequency e_n Cin noise in TIA, the cascode isolation approach works well only at higher input current levels, where you can maintain the cascode gain of the transistor (its fT), perhaps by adding additional bias current. But at very low currents, the bootstrap approach can work better. See AoE III, 8.11, pages 537-555.

Compensation of TIAs wasn't discussed much in 8.11 (dealt with in 4.3), so we wanted to say more, hence new x-Chapter section 4x.3

Beside discussing compensation, we show a few useful tricks. And 4x.3.7 introduces an amazing TIA configuration, which covers a dynamic signal range of 10^7 or more, with a single TIA op-amp. During discussions here on s.e.d., two other approaches came up. See 4x.3.9 using a bootstrap, including a 1-meg TIA with 1MHz bandwidth. And 4x.3.10 with a cascode BJT. There we see again the struggle to maintain wide amplifier bandwidth when using a cascode at currents below 1 to 10uA, also see fT discussion in 2x.9 to 2x.11

--
 Thanks, 
    - Win

Hi Win, yeah I'm redesigning this PD TIA I built years ago... before I read Hobbs. :) It's a big PIN-44* The PD preamp has range scales from 332 ohms to 10M ohms*. I've used all those scales.. 332 ohms the least. Most of the applications I'm thinking of have some small (1-10%) variation in the light intensity. (good interferometers, are the exception I think of first.) And there's certainly a sweet spot for 'as fast as I can' at ~1uA. We've got an optical pumping, and with a fast enough PD you can watch the electron spins go around in the earth's field. And then there's laser locking. Faster and less noise should be a win everywhere. At zero light there's still leakage in the biased PD. (I've got to measure that still.)

George H.

*I've got nothing against reducing the PD area to meet some frequency.. *the grayhill rotary switch puts ~5pf (I measured something around there.) across any feedback R. Which kills all the speed I care about. If I make some bushing to float the switch from ground. Can I make a driven switch? I'm driving the switch body, and no part of the active circuit. (I'm not at all sure that it's C to ground in the rotary switch that is the problem.. but it seems the obvious first thing to try.)

Awesome! (I haven't read or digested much it yet.) On the low noise end, I've been thinking about how to do a non-Poisson-ian light source. Bunched states. It's not easy, I was looking at a diode laser near threshold... but I think I'm seeing mostly mode hopping 'noise'.

George H.

Datasheet says 1nA typical dark current at -10V.

OK, in another post I spelled out the reasons you need to use JFET bootstrap below 1uA. But somewhere above the 1uA to 10uA point, a cascode + bootstrap, Figure 4x.40, might give lower high-frequency en-Cin noise.

If you add CMOS gain switching, detailed below, it'd be reasonable to simply bypass a slow cascode on the 1, 10M ranges, keep high bandwidth for 1nA signals.

You should be able to keep the large sensor, which has more collecting area for low light levels.

Use the CMOS switch scheme in Figure 4x.29.B, to reduce the Cf contribution from the switch to zero. It does add a small 5pF contribution to Cin. For more than two gain settings, add any additional switches on the far side of the first CMOS switch. After several ranges, with low enough Rf, convert back to a rotary panel switch if you want.

Yes, all this goings on can add lots of parts, but they're small, cheap and no issue for automated SMT assembly.

--
 Thanks, 
    - Win

Thanks, I was looking at those. So at the moment, I was planning on keeping the from factor. Here's a pic

I'm stuck with the big housing. I guess I could think about changing the panel... but I was hoping to work with the existing rotary switch and panel.

George H.

That's a huge box, much bigger than the one I use in the RIS-617 design, which has only 3 gain positions.

The CMOS-switch trick to extend bandwidth takes one sot-23-6 per gain range. To use your rotary switch, add one wafer. Its pins will drive an 0603 resistor and half SC70 dual diode, per gain range. Once you get down to 100k or 332k, go back to your old switch scheme. Tiny SMT parts should fit in that big box.

--
 Thanks, 
    - Win