Position Encoding.

This still requires the encoder to move a small amount before the position is known. But, it does require only a very SMALL amount of movement. I would not be astonished to find out somebody already does this, there are a RAFT of absolute or pseudo-absolute encoder schemes out there that use the relationship between several tracks to provide absolute position with just a small movement.

Jon

There's a Hardware Hacker on this -- Don?

As long as direction is known (I suppose you could use something like Manchester encoding, so it always produces a direction on top of the serial bit pattern you're computing against), you should be able to up/down shift it into a register and predict the next step, or compare, or etc. I know LFSRs can be used as counters (modulo 2^N-1, kind of inconvienient, solvable as you note), but it's my recollection that, for obvious reasons, decoding them is nontrivial, so converting that to a positional count is hard (i.e., just look it up in RAM, instead of synthesizing logic to do it from scratch).

Tim

-- Deep Friar: a very philosophical monk. Website:

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What's so special about a linear feed-back shift register?

They aren't actually unique. Look at the example here

amd note that 0001 reappears - in the the overlap of 0100 and 0010, which you can rewrite as 010 0001 0 - a couple of cycles later. You need more than N bits of context before you can determine an absolute position.

Serial communications codes deal with this problem by including unique framing synch sequences which you can use to identify how to break up the serial bit stream into multi-bit chunks, which is exactly equivalent to your "index pulse".

The HDLC-style solution - where N+1 successive zeros is always and only a frame synch sequence - could let you synchronise after reading only 2N+1 bits if you alternated the 2^N-1 possible n-bit numbers (excludng N zeros) between frame synch sequences, or you could use

-- Bill Sloman, Nijmegen

so what's the advantage of this over gray code? i can think of a serious disadvantage.

I guess the brute force approach is to put N bits in an identical lfsr and count how many steps it takes to get to a known value

a quadrature decoder done right is pretty robust with regards to noise and contact bounce, I think you'd lose that if you do it in other ways

-Lasse

I said the _output_, which goes 000100110101111 and then repeats, or if you insert the zero, 0000100110101111. Not the _state_.

Please show me the repeat in the above.

Assuming you're getting differential from a quadrature (2-bit gray code) it means that you only need three tracks for any resolution of encoder. An N-bit absolute encoder with gray code still needs N tracks.

He'd only need three tracks, the quadratures and the PRBS one. The PRBS would replace the index track, but find the absolute position in a much smaller rotation. Cute idea.

John

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You've described a single-track encoder (or code+clock track) where the position track is coded with a non-repeating sequence, and absolute position can be known, for example, in m bits for a 2^m-1 maximal length sequence.

Older tech was a conductive Gray-coded track, with multiple pickup contacts spaced one bit's distance apart.

-- Cheers, James Arthur

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Two tracks. You get quadrature out of a single track - it takes two detectors looking at the same (moving) track through separate parts of a static mask. Some primitive optical position-sensing systems didn't work this way, but they were hard to align and prone to fall out of alignment - Lintech in Cambridge were dumb enough to buy such a system back in the early 1980s, but Cambridge Instruments dumped it when they bought the company from the receiver, making the service engineers much happier.

If it actually works for N>4.

-- Bill Sloman, Nijmegen

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That's not a maximal length sequence. If I parse your first sequence into four bit chunks 0001,0011,0101,111(1) it looks like 1,3,5,15/F, while the second one comes out as 0000,1001,1010,1111 or 0,9,10/A,15/ F.

Linear feedback shift registers are traditionally configured to cover the 2^N-1 possible states of the N-bit long shift register, which is a (2^N-1).N length bit sequence. Are you claiming to have found a feedback network that generates a shorter sequence, only 2^N-1 bits long, where each N-bit chunk is unique?

If you have it's not something I've heard about before - which doesn't mean all that much, since I've never got deeply immersed in that kind of maths.

-- Bill Sloman, Nijmegen

-- Bill Sloman, Nijmegen

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P.S. -- here's an actual implementation, with parallel bit readout by a linear photodiode array:

--James

Well, I find that astonishing, given that I generated it from the polynomial x^5 + x + 1 (seeded with 0001), and that it's 15 bits long, and that it repeats just as you'd expect.

Why do that? The important thing (to me) is that if you parse it into _any_ consecutive four bits, the answer is unique compared to any _other_ consecutive four bits.

Oh really? That's not how I've seen it in any of the comms systems I've worked on. The sequence that's generated by a LFSR is the sequence of bits you get by picking off the state of one bit (or some linear combination of bits) in the register for each of the 2^N-1 states, to get a sequence of length 2^N-1.

But apparently you know more than the folks who invented CDMA phones.

Yes. Furthermore, I suspect that it is a property of any maximal-length LFSR.

Indeed, apparently you have not.

That's actually close to what I'd like, except they're peddling just the light sensor, while I'd like to have a chip that just reads out the right answer if you give it a code wheel that's laid out correctly.

(snip, someone wrote)

Looks right to me.

But not if you pad it to 16 bits. If you use a longer one, it might not be unique when it comes back around again to the splice point. There should be some sequence of period 2^n that has unique n bit subsequences. I don't think I could prove that there were such sequences, though.

But last time I worked with rotary encoders, they weren't a nice power of two around. You could pay extra for one of those, but otherwise each one came with the exact number, near the one specified in the catalog.

But how do you find the position from the n-bit subsequence? One way is with a look-up table.

If you aren't in quite as much of a hurry, there are many other codes that could be used. You could have N zeros, followed by a one, and then an N bit binary number. After you see the N zeros and one, then read out the N bit number. No look-up table needed.

-- glen

(snip)

Last time I did a quadrature decoder for such it was in an FPGA, and most FPGAs now have block-RAMs that could easily make a look-up table.

-- glen

Not optical, but very simple for reasonable resolution...

These are pretty high output - IIRC 300mV p-p for 5V supply, very low power, very small and very sensitive. Straight into 2 ADC channels or use a little gain if you like.

Cheers

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Rats. I've just found another thing I knew that wasn't so. Thanks for the correction.

-- Bill Sloman, Nijmegen

On Dec 22, 1:17=A0am, Tim Wescott claimed:

There is probably a typo in there with x^4 + x + 1 being intended. If not, and x^5 + x + 1 is really what Tim used, then I don't believe the claim. Note that

(a) the seed should have 5 bits, not the specified 4-bit initial loading of 0001

(b) the period would be 3 or 7 or 21 depending on the seed. x^5 + x + 1 =3D (x^2 + x + 1)(x^3 + x^2 + 1) is not a primitive polynomial and this is not a maximal length LFSR.

Dilip Sarwate