On Dec 22, 12:32=A0pm, Tim Wescott claimed:
I disagree with some of the details (which may be typos again) and some of the design aspects too.
A maximal-length sequence of period 2^N-1 has
2^{N-1} ONEs and 2^{N-1}-1 ZEROes in one period. So, you need to count 2^{N-1}-1 ZEROes, not 2^N-1 ZEROes as you state. So you need a (N-1)-bit counter and it will contain all ONEs when the count reaches 2^{N-1}-1. Second, if the goal is to have a sequence of period 2^N such that the 2^N possible (overlapping) N-bit subsequences are all distinct, then the extra ZERO _must_ be inserted in the longest run of ZEROes in the m-sequence, not at a randomly chosen point whenever the count reaches 2^{N-1}-1, as it will once each period. So, matters (including the initial LFSR loading) have to be arranged so that the count reaches its target 2^{N-1}-1 some time while the LFSR is spitting out this longest run. At this time, you want to turn off the LFSR clock for one cycle, insert the zero into the output stream (just take it from the LFSR output stage!), and start the LFSR clock again. I am not a hardware person, but some friends who are circuit designers claim that turning off the clock to some parts of a circuit to achieve a logic step is not a good idea. But this may well be process-dependent, and/or sort of a religious issue, and I don't know enough to take sides.
You need a **slightly less** ginormous (N-1)-input ONE detector to detect that the ZERO counter contains 2^{N-1} - 1 =3D 111....111. So I don't see much savings there.
Dilip Sarwate