Position Encoding.

On Dec 22, 12:32=A0pm, Tim Wescott claimed:

I disagree with some of the details (which may be typos again) and some of the design aspects too.

A maximal-length sequence of period 2^N-1 has

2^{N-1} ONEs and 2^{N-1}-1 ZEROes in one period. So, you need to count 2^{N-1}-1 ZEROes, not 2^N-1 ZEROes as you state. So you need a (N-1)-bit counter and it will contain all ONEs when the count reaches 2^{N-1}-1. Second, if the goal is to have a sequence of period 2^N such that the 2^N possible (overlapping) N-bit subsequences are all distinct, then the extra ZERO _must_ be inserted in the longest run of ZEROes in the m-sequence, not at a randomly chosen point whenever the count reaches 2^{N-1}-1, as it will once each period. So, matters (including the initial LFSR loading) have to be arranged so that the count reaches its target 2^{N-1}-1 some time while the LFSR is spitting out this longest run. At this time, you want to turn off the LFSR clock for one cycle, insert the zero into the output stream (just take it from the LFSR output stage!), and start the LFSR clock again. I am not a hardware person, but some friends who are circuit designers claim that turning off the clock to some parts of a circuit to achieve a logic step is not a good idea. But this may well be process-dependent, and/or sort of a religious issue, and I don't know enough to take sides.

You need a **slightly less** ginormous (N-1)-input ONE detector to detect that the ZERO counter contains 2^{N-1} - 1 =3D 111....111. So I don't see much savings there.

Dilip Sarwate

Reply to
dvsarwate
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It trades off one set of complications for another set - either way, a parallel detector is going to be harder to make than a serial detector.

-- Bill sloman, Nijmegen

Reply to
Bill Sloman

It's probably easier to count contiguous zeros and just add one at the end of the length N-1 string. The LFSR can be stopped while the zero is inserted with a deasserted clock enable to the LFSR (rather than stopping its clock, you disable it's enable, hope that makes sense). Most logic these days has clock enable capability for selective power saving modes, etc. This is pretty routine in FPGAs as well.

Eric Jacobsen Anchor Hill Communications

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Eric Jacobsen

Anything Slowman suggests should be looked at with a very jaundiced eye. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

(snip on LFSRs and optical rotation encoders.)

I don't think it has been mentioned yet that the shaft can go both directions. That complicates the detection of the bit sequence.

I suppose I would put in two shift registers, one for each direction, and a counter to keep track of the position from the start. As soon as the rotation has gone past + or - N from the starting spot, then one of the shift registers will have an N bit sequence.

I suppose you really only need one, storing the bits in the appropriate direction from the starting point. With two, and the right counters, you can get the position when the sum of the deviations from the start is equal to N.

-- glen

Reply to
glen herrmannsfeldt

--
It has been mentioned at least twice.

Once as separate quadrature detector track and once as a magnitude
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Reply to
John Fields

--
But the payoff is it'll require substantially less shaft rotation in
order to determine its position and no quadrature track in order to
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Reply to
John Fields

What else is new? He couldn't afford a clue, even if they were free.

--
You can't have a sense of humor, if you have no sense.
Reply to
Michael A. Terrell

You do have that effect on people! ;-) Have a blessed Christmas. :)

--
You can't have a sense of humor, if you have no sense.
Reply to
Michael A. Terrell

Thanks, Michael. Don't eat too much!

John

Reply to
John Larkin

free.

Michael Terrell does seem to have a resricted income, which means that he doesn't recognise the clues that indicate that I live rather more comfortably than he does.

-- Bill Sloman, Nijmegen (but in Lyon at the moment - the first of our Michelin-starred restaurant bookings is for this evening. It's only a two-star restaurant, so the check for the four of us might not drain even Mike Terrell's checking account.)

Reply to
Bill Sloman

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Invest a million in engineering the parallel detector and save a dollar on the quadrature detector. The payoff really isn't going to cover the costs of getting to to work.

-- Bill Sloman, Nijmegen

Reply to
Bill Sloman

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-- Bill Sloman, Nijmegen

Reply to
Bill Sloman

I have to watch every meal, because of the Diabetes. :(

Take care. :)

--
You can't have a sense of humor, if you have no sense.
Reply to
Michael A. Terrell

--
Considering that parallel detectors have already been developed and
have been used in conventional absolute encoders - for decades - means
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Reply to
John Fields

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The development involved isn't that of the parallel detectors - which, as you say, have been around for a while now - but the mechanical hardware that puts them in the right place with respect to the light source and the the rotating disk, and keeps them there after someone bangs the assembly.

It isn't a trivial exercise even if you've got infinite room around the shaft, which you never have, and it's usually close enough to impossible to be very expensive indeed.

This doesn't stop ignorant engineers with under-developed imaginations from proposing such impracticable solutions, and spending so much money trying to get them to work that nobody is prepared to admit that they shouldn't have tried to do it that way in the first case (the sunk cost fallacy).

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-- Bill Sloman, Nijmegen

Reply to
Bill Sloman

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In any correctly done (maximal length) LFSR the unique codon minimum is the length of the LFSR. This for a 4 bit LFSR the unique codon length is

4 bits, for an 8 bit LFSR it is 8 bits. That gives you the tradeoff in codon length versus total number of codable positions. An interesting slot for one track.

I suppose that it may be possible to serialize Grey code onto one track with similar results, but without the guarantee of each n bit sequence is unique. One more track for a codon index?

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Reply to
josephkk

--
Those are interesting opinions, albeit being opinions expressed by
those who either have no mechanical design expertise or have numerous
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Reply to
John Fields

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I've merely been within ear-shot of the people who have made this kind of mistake.I've got quite enough mechanical design expertise to appreciate what had been going on - and it wasn't in projects where I had any kind of direct involvement.

It's not an entirely intractable problem, merely one that is difficult enough to make other approaches much more attractive. Engineering is doing with one dollar what any fool could do with two, though in this particular case the ratio tends to be a bit larger.

-- Bill Sloman, Nijmegen

Reply to
Bill Sloman

--
If it wasn't in projects where you were directly involved, then you
have no real experience and are merely parroting what you think others
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Reply to
John Fields

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