EUV

Of course EE Times is as idiotic as usual. Neither power nor wafer throughput is measured in MPH.

Well, it is working GREAT for the vendors of these wafer steppers! How well it will work for actual production of tested chips is probably not yet known. (As secretive as the fabs are about yield, the only way to know how well it works is to check the prices of the next generation of chips.)

I suspect the first 7 nm chips are going to be sticking around the lab for a while to evaluate all the issues that keep getting worse as they shrink the dimensions. Leakage can be evaluated right away, but electromigration requies some extended testing.

Jon

Sub-300nm technology is useless for Analog functions. Although some fabs are starting to act like Analog is a thing of the past :-( ...Jim Thompson

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

When you've got that many transistors in the space of a single analog one, it's true, too. :(

Tim

The EUV machines aren't steppers, they are scanners. Stepping would involve high acceleration and deceleration, which would set up vibrations that would take too long to die out to nm dimensions. So the exposures are done with the mask, the lens, and the wafer in continuous motion. That's mind boggling at nm precision.

One EUV scanner, with source, costs something like $120e6.

The big market will probably be memory, DRAM and flash. The NRE on a fine-pitch chip like this is something like $250e6.

Nah, you can do good analogue down to 65 nm, and super good RF on 32-nm SiG e.

Cheers

Phil Hobbs

I'm expecting 1.2 volt max opamps any time now.

Excellent for deafaids :) Providing the leakage isn't too high :(

Mirror accuracy sucks and are grossly leaky to boot. ...Jim Thompson

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Thinking outside the box...producing elegant & economic solutions.

Mirror accuracy sucks and are grossly leaky to boot.

I didn't mean that you could necessarily do it the same way as at 1 um, just that it was possible. The 65-nm node was the peak for individual transistor performance, AFAIK.

Some IBM pals of mine did a 90 GHz transceiver chip ten years or so back, on either 32 or 65-nm SiGe. I left there in early 2009, so I don't know what they've been up to since.

Cheers

Phil Hobbs

RF and LINEAR Analog are two _very_distinct_ circuit situations. ...Jim Thompson

Oh, that has been going on since 1980, at LEAST! And, there ARE analog-type things that can be done better by DSP technologies. You can eliminate a bunch of drift sources, hold calibration settings indefinitely, etc. For really slow stuff, it makes a lot of sense. A lot of outfits would like to forget the "old days" of installing trim resistors at test time, etc.

But, yes, most of us who design stuff know that analog will never really go away!

And, yes, in many cases, if you try to shring the analog stuff, the noise bites you. But, of course, you can usually build large transistors, etc. on a small process.

Jon

Wow, I had no idea they did it that way! Very tricky.

No surprise. The light source, alone, is very hard to do, the precision in the wafer and mask handling boggles the mind.

Yes, certainly, these are markets where smaller is a huge sales win. CPUs are maybe less so, but more functional blocks and cache memory will always help.

Jon

Jon

Intel was a major investor in ASML's EUV, four gigabucks as I recall, so they must plan to use it for CPUs or possibly their new nv RAM.

The Cambridge Instruments - Thompson-CSF shaped beam electron beam microfab ricator worked that way back in 1985. The laser interferometer that kept tr ack of where the stage was to a small fraction of the wavelenght of He-Ne l aser could be picky about how fast you could move the stage, but Zygo intro duced a new interferometer around then which could tolerate much faster mov ement. I would have liked to use it, but we didn't really need it, and the production machine would have used a regular Hewlett-Packard interferometer if we'd ever got as far as building it.