You don't lose anything by having a high-side MOSFET connected (though off)?
You don't lose anything by having a high-side MOSFET connected (though off)?
To be fair, there are also chips out there designed for high resolution PWM, control and DSP applications, and stuff like that. They have sub-clock timing accuracy thanks to tricks like trimmed and compensated delays, and DLL/PLL stuff. The kind of stuff Don Lancaster used to dream about: enough processing power, timing accuracy and output hardware to do real time "Magic Sinewaves", say for multiphase motor drives.
But I don't know that any exist for delaying external signals (asynchronous trigger). In that case, you would have to trigger on an interrupt, which synchronizes everything anyway (but worse again, if the interrupt latency is variable). If it's periodic, you could DLL it, but gee, what a mess...
Tim
-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
John's been doing that stuff for decades.
Cheers, James Arthur
I wrote that part. Wiki wouldn't allow me to footnote my company name unless I made an actual contribution.
I have one other Wikipedia contribution, the curved icicles picture.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
The issue would only be the gate output node's off capacitance. I found it to be quite small, although I haven't measured it, should do so.
-- Thanks, - Win
Yeah, how much charge injection might you get when the tri-state output switches hi-Z?
I'f try it but I'm in the mountains, nary an oscilloscope in sight.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Huh, can I use one to switch gain in a lock-in thing? (sorry, I don't know much about high speed.)
What's slow? Or perhaps more important (lockin-wise) is the delay constant and equal (on/off)?
George H.
With an FPGA and some support hardware, yes, absolutely. :)
Doubt you can find an MCU with that inside, though. (Maybe you could hack it with an SoC, if you don't mind that it's also low bandwidth? But then you might be okay with the MHz+ quantization anyway, so who cares.)
Tim
-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
COOL!
WM,
gh
gic
us
It has been around - initially as the MC100E196 - for at least twenty years . There were similar parts on offer before that, but I don't know of any that stayed in production.
The delay is temperature dependent. When I wanted to use it I figure on mea suring the delays every few minutes and picking the one currently closest t o the delay I wanted. You could also stick a Peltier junction onto the top of the device and force the junction to remain at a constant temperature (w hich wouldn't be an entirely trivial exercise since the ambient temperature would influence the MC100EP196 junction temperature through the bottom of the device and you'd have to over-drive the Peltier junction to keep the re levant bit of slicon at the right temperature).
John Larkin may have been doing that kind of stuff for decades, but we put together a system for exactly that job at Cambridge Instruments from 1988 t o 1991.
It was working in 1991 but marketing didn't think that we could sell enough of them - it was part of system that would have sold for about a quarter of a million dollars per unit - to cover the cost of getting it into full p roduction.
As an asynchronous system, you could have any delay you wanted from about 4
0nsec up to about 10msec in 10psec steps.It was intended to be used on stuff that did repeat itself with some precis ion, and the delay path was doubled up so that you could fill in the first
40nsec from the delayed version of the previous signal, while going on to s ample from the closest trigger edge after than 40nsec.-- Bill Sloman, Sydney
Oops, I mean to add I was talking about MCUs equipped with such functionality.
But yeah, there are special purpose things like that, too, but usually with quirks, like the tempco.
Tim
-- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
One of my guys is arguing that we should use an ATF-55143 ephemt to discharge the caps. That would slam them hard all the way to ground and eliminate the diode tempco effect on timing. Those phemts have absurdly small Cg-d, so wouldn't pump the ramp down at startup.
He's right of course. I hate it when other people are right.
I think we could keep the analog mux/bus switch thing to switch the big cap in and out.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Sack him! Get in a yes man... ;-)
It's great when other people have good ideas. But it means that I missed or dismissed a good idea. That's the part that I hate.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
What's Coss for that FET?
-- Thanks, - Win
My guy says that the Spice model has Cds+Cpackage totalling about 0.22 pF. I'd guess a tad higher from eyeballing the s-parameters, maybe 0.6 pF, but that includes the Miller feedback, not an issue if we are switching on and off. Cd just adds a tiny bit to my ramp capacitor.
The gate-drain capacitances are tiny in phemts, 0.143 pF in the ATF model. And the gate on/off swing will be small, 0.6 volts or so, so the g-d charge injection will be almost nil. I wish data sheets would include more capacitance specs; the RF boys sort of dump RF into the gate and expect more RF at the drain, not much help if you want to switch.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.