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bad, better delay circuits

We want to trim the rising edge times of some pulses. The obvious circuit is a current source + capacitor linear ramp followed by a comparator.

The first circuit here was the initial idea, seems simple, until I started thinking harder.

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BSS123 is about the best compromise between capacitance and ON resistance, and we have it. The two problems here are

the g-d capacitance of Q1 shoots an ugly negative spike into C1 at ramp start and

the drain capacitance of Q2 is nonlinear, which is maybe OK, but the drain voltage can wander all over the place. That modulates the ramp slope, and the body diode could conduct at ramp discharge time. Fixes for that are variations of ugly.

E-Phemts would be better than mosfets, but that would multiply the parts cost by 5x or so. Open-drain cmos gates could be interesting, but we don't have any in stock

The second circuit looks better. The mux switches in C2, or keeps it grounded. These "bus switch" parts are actually killer analog multiplexers at a fraction of the price of things sold as analog mux's.

The comparator is of course an LVDS line receiver, another example of using a part off-label and saving a bunch of dollars and nanoseconds.

Another bus switch could be used to discharge the cap, instead of the diode, but sadly their control-input delays are high. That's the pattern in mux's: fast signal path, slow switching.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin
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I'm using diodes to reset 22pF caps for some variable nanosecond-delay circuits. Variable pullup, 220-ohm plus 1k pot. Works well, but the issue is what diode? Need a relatively high-current capability for rapid cycling, but a moderately low capacitance across the 22pF. Ended up with SD103AW, accept the added 15pF. SD101AW is only 1.5pF, but too wimpy. Didn't find a small compromise Schottky diode.

What'd you choose?

In another case, used 74LVC1G125 or 126 to discharge the cap, that worked even better. Ground logic input, control with OE pin. Very speedy discharge and release. Remote time delay adjustment with voltage to LVDS.

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--
 Thanks, 
    - Win
Reply to
Winfield Hill

I picked up some RUM001L02T2CL that are a hell of a lot smaller (electrically) than garden-variety 2N7002 or BSS138. For that matter, quite a bit smaller (physically) too!

The timing edge into 220pF looks blameless. At 22pF there may be a bit of hook, but not enough to matter (

Reply to
Tim Williams

My favorite diode, SMS7611 or the near-equivalent BAT15, around 0.3 pF. But the series resistance is relatively high, 10 ohms maybe, so it won't discharge a big cap fast. There are some lower resistance parts in the 1-2 pF range, like SMS3922 at 1 pF.

Hey, 10 ohms and 22 pF is 220 ps! A CMOS driver might be over 10 ohms by itself. Inductance is going to hurt, too (or possibly help... gotta Spice that one day.)

A lot of diode capacitance makes the cap voltage hop up at the start of the ramp, too. 15 pF of diode into 22 pF of ramp cap will be a jackrabbit hop.

You might consider a smaller ramp cap and less current if you use a smaller diode. Or discharge with a phemt to ground.

That's interesting; we have those. Prop delay is not going to beat a schottky diode! I'd want to test for charge injection and whatever.

What I'm doing is similar, but we might want to switch delay ranges.

You could use my LED current source:

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(We have a few other tricks that are too good to post here.)

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

That's a nice part. Crss is only 1.7 pF, and one could reduce the gate drive to further reduce charge injection into the ramp cap.

2.5 volts into the gate, 1.7 to 100 pf (my cap) is just 40 millivolts of jump.

It computes to 200 mV with a 22pF cap, but the channel is still conducting for part of the gate turn-off swing, so it will be even less. Needs a breadboard or a good Spice model to be sure.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

Here's a circuit you won't need to spice.

___ ___ ___| .-----. ___| |___ ---->>----| MCU |---->>---- '-----'

You can set a delay, a pulse width, active edge or have it count edges before emitting a pulse. Different delays on the rising and falling edge is possible. A wide variety of things can be done and changed on the fly. The clock can be internal with a good accuracy. The magic of digital logic can do so much.

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Rick C
Reply to
rickman

Yes, but very surprisingly-node capacitance.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

You could ditch the inverter for a flip-flop, and add a coupling capacitor from /Q to cancel the g-d capacitance spike... as long as you could get close enough tolerance to match it.

Reply to
Clifford Heath

That sort of thing is always tricky. To keep the ramp from wobbling at the start, the charge injections would have to be time aligned. The diode is a lot easier.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

In general, how closer can you expect Q and /Q to be aligned, for the kind of CMOS FF you'd choose? (given that rising and falling slopes might differ, as well).

Reply to
Clifford Heath

Why not just modulate that current source? A mux/switch isn't the most repeatable of resistors.

Reply to
whit3rd

Sure, that's the easy one. Two currents and two caps gives me four ranges.

But mux's work fine.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

Rohm provides a LEVEL=3 SPICE model. No package parasitics. Seems okay, but I haven't done detailed comparisons or anything.

They do seem to be ESD or temperature sensitive. Between the small size and my loose ESD controls (namely, no antistatic mat and such), they're a bugger to hand solder reliably...

I think there are some dual MOSFETs of similar stature, too, which may be of interest to you.

Tim

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Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com
Reply to
Tim Williams

Very nice. Now give it pS resolution and jitter and you'll be up to where John was roughly thirty years ago.

Cheers, James Arthur

Reply to
dagmargoodboat

A cheap 50 GHz ARM uP might get close.

Actually, some of the latest FPGAs have insane SERDES blocks, things like 25 GBPS. Some semi-fast timing could be done with them, but power consumption and cost and jitter would all be bigly.

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John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

The flop would be fine. We have a 1 ns Tpd CMOS part in stock, edges maybe 500 ps, and they should be well matched. A flipflop makes a nice symmetric complement-edge thing even if you don't really need a flipflop.

(TI used to make a complementary-output gate, in classic TTL I think. That's a handy function.)

The problem is the mosfet. Its turn-off behavior is ugly in a very complex way. Diodes are easier to understand.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

I don't see where anyone was asking for ps resolution or jitter.

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Rick C
Reply to
rickman

Then why do you think he was worrying about charge injection into 22pF? You just weren't paying attention.

Reply to
Clifford Heath

Win was using a 22 pF ramp cap. My circuit switched between two caps,

100 pF and 10 nF. Charge injection is still a concern at 100 pF. The ramp starts in the wrong direction (down instead of up) and takes a while to get sensible.

I figured that the 100 pF cap would give me a 25 ns ramp, with maybe

100 ps settability (turning a pot) and maybe 10 or 20 ps RMS jitter. Numbers like that; this is a cheap circuit.

Ricky is obnoxious, which I could tolerate if he was very good at anything.

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John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

The nice thing about tri-state gates, they have awesome optimized low-voltage 3.3V mosfets to pull down the cap, and optimized gate drive to turn them off. Can't match w/ a discrete.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

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