16 discussions on ElectronDepot about the Xilinx DSP48: what owners asked, what went wrong, and what fixed it.
Let's say you had a really high voltage, low current source. Not very =useful. Think nuclear battery, or lightning.So let's say you use it to charge a stack of caps. Then you rewire the =caps in parallel. It's like an inverse Marx...
Two slices per CLB, four 6-LUTs + 4 FFs per slice. A LUT can beconfigured as a RAM64 or SRL32. But a CLB can only have 4 RAMs or SRLs(similar to SLICEL / SLICEM). DSP blocks have a 25x18 multiplier(useful for 32-bit floating point). ...
It?s well known that the ARM design goes into the bulk of the mobile devices. Presumably because it?s most efficient, energy wise. However, Intel has the best chip designers in the world. So how did ARM outwit them? Anybody here have any...
Hello guys,I just made a quick speed test in ISE 7.1 with a Spartan 3E device. A32-bit counter runs at 129 MHz in XC3S500E-4, but in a Spartan 3XC3S400-4 at a higher 168 MHz. Also checked a few other desings, likeDDR SDRAM controller, and...
So, just doing a brief search, it looks like Altera is touting a floating point slice in at least one of their lines. Is this really a thing, or are they wrapping some more familiar fixed- point processing with IP to make it floating...
Hello,I need the highest possible number of multiplication operations persecond at low cost. I know that several factors affect the overallperformance, but since I have no idea which FPGA chips might be worthto be considered, I'd like to...