how to check cache setup for MPC5200??

Hello, can somebody help how to check in the 2.6. source tree how DBAT registers are set for MPC5200? I just see settings for DBAT2 in arch/ppc/syslib/mpc52xx_setup.c. I think this is just disabled internal SRAM space. But what about the rest? Thanks for help.

Reply to
martinfnp
Loading thread data ...

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.