a pci + linux query

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Hello friends,

I am at present working on writing a device driver in linux for pci
bridge that is present in mpc 8266 having a real time favor of linux
OS on board. Actually our purpose is to use design a card which have
two processors on it and use pci bus to communicate between them. I
have some  conceptual doubts regards to pci bus.

Q. What is prefectable memory and non-prefetchable memory in case of
mpc8266 pci controller?
Q. How is access of a pci prefetchable memory different from a non
prefetchable memory?
Q. Are Machine check interrupts some thing similar to probe signals in
device driver context?

please help me out.

nikhil

Re: a pci + linux query
Here is my understanding having work a bit with PCI devices but not PCI
bridges directly

Prefetchable memory is typically memory of some kind where the data
contents will not change once accessed. Typically PCI reads/writes
happen in bursts across the bus for this to work often the data is read
into a set of FIFOs and then presented on the bus. So prefetchable
memory is memory for which you can do burst accesses. This is usually
just SDRAM, or SRAM that is memory maped into PCI space.

Non-prefetchable is usually a set of PCI memory mapped registers. For
this type of memory you cannot do burst accesses and single-cycle PCI
accesses are only possible.

I don't konow about Machine check interrupts - sorry!

P.S> In writing PCI device drivers be careful of out of order code
execution i.e. the order in which your code is written to access PCI may
be changed by compiler optimisations so you need memory barriers to
ensure correct execution.

eg.
    1. readw( &val, addr );
    2. writew( val, addr );
    3 readw( & val ,addr );

would become
    
    1. readw( &val, addr )
    rmb();
    2. writew( val, addr )
    wmb();
    3 readw( & val ,addr )
    rmb();

In order to guarentee the order of execution.

/Keith

    

nikhil bhargav wrote:
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