BTW:
A one pole high pass that corners at about 20KHz
you can understand what is being said going into the input.
-- OK. Now, what are the lowest and highest frequencies you want to capture, what's the highest voltage the input signal will ever go to, what kind of accuracy do you need in the output period, and what resolution and accuracy do you want in the output pulse width? BTW, where will your input signal be coming from and what's your application? JF
--- Just for grins, here's the basic scheme:
+-----------+ | +-----+ | +-----+ +----+ HFCK>-----------------------+--|> | +--|> TC|----|R | +------------|MR Qn|-----|Dn | | | | +----+ | | | | +--|S Q|-->OUT ACIN>-+-[>0ZCD]---+-+-|S Q|-+-|E Q0|-----|D0 | | +----+ | | | | | +-----+ +--|L | | LATCH2 +-[PEAK DET]--|-|R | A COUNT | +-----+ | | +----+ UP | COUNT | | LATCH1 | DOWN | +-------------------+----------+When ACIN goes through zero, heading positive, the zero-crossing detector generates a single pulse which sets LATCH1, resets the up-counter, loads the down-counter with the contents of the up-counter before it was reset, and sets LATCH2.
LATCH2 will now stay set until the down-counter gets to zero, at which time it will reset and the output pulse will go low.
During the time the down-counter was counting down the previous contents of the up-counter, the up-counter was accumulating high-frequency clocks because LATCH1 had enabled the up-counter.
Now, when the peak detector detects the peak of the AC input signal, it resets LATCH1, which disables the up-counter, keeping it from counting, while keeping its outputs wherever they were when LATCH1 was reset.
The circuit now remains in that state until the zero-crossing detects another positive excursion through zero volts, when the cycle begins anew.
Here's the timing: _____ _____ _____ _____ | | | | | | | ACIN __| |_____| |_____| |_____| ZCD____|___________|___________|___________|_____
PDET___________|___________|___________|________
___ ___ ___ ___ A______| 5 |||||___| 4 |||||___| 3 |||||___| 2
TC_____________|___________|___________|________
___ ___ ___ ___ OUT____| 4 |||||___| 3 |||||___| 2 |||||___| 1 ||
Notice that the count accumulated by the up-counter will be proportional to the amplitude of the input signal, and the length of time it took to accumulate that count will be the width of the output pulse.
Note also that the output pulses occur precisely one input signal period later that the input signal transitions.
JF
Oops...
When the down-counter's terminal count (TC) output goes true we want it to freeze the counter until the next output from the ZCD loads it, forcing TC low and enabling the counter.
+----+ +-----------------------------------|S Q|-->OUT | +-----------+ | | | | +-----+ | +-----+ | | HFCK>-------------|---------+--|> | +--|> TC|--+-|R | +------------|MR Qn|-----|Dn _| | +----+ | +----+ | | | E|O-+ LATCH2 ACIN>-+-[>0ZCD]---+-+-|S Q|-+-|E Q0|-----|D0 | | | | | | +-----+ +--|L | +-[PEAK DET]--|-|R | A COUNT | +-----+ | +----+ UP | COUNT | LATCH1 | DOWN +-------------------+JF
-- I think there's something wrong with this circuit... I'll check it out and post what I find tomorrow. JF
You are nothing more than a liar and a coward. Go crawl back into your hole, little one.
-- Roger Blake (Subtract 10s for email. "Google Groups" messages killfiled due to spam.)
Maybe I'm missing something here, but I don't see how the count will be proportional to the amplitude. Assuming for example a pure sine wave, the peak always comes at the same phase, regardless of amplitude. (I'm assuming here that your peak detector is the kind that fires a pulse when it passes the peak, not the kind that just holds the peak, since that wouldn't make sense feeding a digital latch.)
Best regards,
Bob Masta DAQARTA v4.51 Data AcQuisition And Real-Time Analysis
-- Yup, that's what I was addressing with: "I think there's something wrong with this circuit... I'll check it out and post what I find tomorrow." in my last post on this thread. I think the trick is to get rid of the up-counter and to load the numerical output from the peak detector into the down-counter, then to count it down after the next zero crossing.
ote:
gBy the way, if you really want something which is not necessarily what you specified in your original post, but rather you want a digital signal which, when connected directly to a speaker, will sound like the original audio, and which works for polyphonic music and speech as well, then what you want is a 1-bit sigma-delta ADC. This results in a bit stream that can sound quite good (e.g. Sony SACD or many ordinary CD players also use a 1-bit DAC).
If you want a very simple circuit which approximates this well enough for an intercom or phone quality of audio, then all you need is a D- flip flop, an R-C filter and a comparator (which can be approximated by a logic gate input if you want the cheapest system). If you have never built one of these, you really should because it is very surprising when you turn it on the first time with a walkman attached to the input. Try some different resistor and capacitor values because I have forgotten what works best. Make sure that you use the inverting output of the flipflop for the feedback. I suggest 74HC74 devices. You could buffer the output with logic invertors to drive a speaker. To keep the power dissipation low, put a big capacitor in series with the speaker.
Basically, as follows (view in a fixed width font e.g. courier):
Audio in 10k 10k *---||-/\/\/\-*----/\/\/\-, 100uF | _____ | | | _| | ,---*--|D Q|--. | | | 100nF--- | Q|-----Out --- |_/_\_| | 74HC74 | --- Clk 1MHz GND
By the way, you can emulate the D-flipflop using a fast microcontroller if you want, by reading the state of one port bit (the D input), and writing the value to another port bit (the Q output).
If you want a more fancy version, look here:
Chris
The problem is that the peak detector as shown only detects the peak *time* (as a count), which contains no information about amplitude... only
*when* the peak arrived.Best regards,
Bob Masta DAQARTA v4.51 Data AcQuisition And Real-Time Analysis
OK, here are the details. I *thought* this all sounded a bit familiar: Turns out it was a strategy I used in an ignition system for GM back in the mid-70s called ESS (Electronic Spark Selection, see US patent 4,077,372). The basic idea in that was to produce a variable phase delay (spark delay in degrees relative to Top Dead Center), but the same concept would apply here.
When you detect a cycle start, you start charging a capacitor with a current proportional to the desired phase delay (duty cycle here). This can be done via an op-amp integrator with a variable input voltage, but I find it easier to visualize this with charging capacitors.
The capacitor charges until it reaches a certain fixed threshold, at which time the charging current is switched off and a fixed discharge current is switched on. It discharges until the start of the next cycle, at which point the system switches back to charge. (Use a flip-flop.)
At longer cycle times, the discharge portion will go down to a lower voltage before the next cycle starts, which means the charge phase will take longer to reach the fixed threshold. The waveform will be a large sawtooth extending below the threshold voltage toward zero (which it must never reach... adjust values for different ranges). At shorter cycle times the sawtooth shrinks upward toward the threshold. Eventually it gets too small to detect reliably, which sets the upper limit on frequency.
Worked great in old Cadillacs, as a cheap-and-dirty alternative to fully computerized ignition. Got about 90% of the fuel economy benefits, at 10% of the cost. But it didn't get used much (Eldorados only, I think, for just one or two years) before computers took over.
Best regards,
Bob Masta DAQARTA v4.51 Data AcQuisition And Real-Time Analysis
-- Right. What I had in mind was a digital peak detector using an ADC, a couple of latches and a magnitude comparator. I'm working on the schematic of the whole thing right now and I'll post it to abse when I'm done, which will probably be late this afternoon or early tomorrow. JF
How about this:
If you integrate (sum) the ADC output over a half cycle, the total will give the length of time to hold the output high on the next half cycle. This makes your amplitude the average rectified instead of the peak but that seems just as good.
-- Maybe even better, since it gets rid of the peak detector! The down side I see, in hardware, is the need for 16 bit adders to do the integration for an 8 bit input. Here's what I've got so far: news:bbjqj4do2pnesinvd9lh2c1q2tj7665uk4@4ax.com I did it in 4 bits instead of 8 because I thought that would make it simpler but, in actuality, doing it in 8 ( using an HC688 for the magnitude comparator, a couple of HC273's for the input latches, an HC40103 for the counter and a single HC175 instead of the HC74's) would have resulted in one less chip. If I get ambitious I'll redraw it... :-) JF
it seems LTs chips like to have the inputs at close volages (max difference 0.6 or 1.2 v)
and less complex. using voltage controlled switches is cheating! real parts only.
I've been playing with (a simulation) of a simpler (and less capable) version but had problems with max differential input, bias current, and oscillations. (and a glitch on rising zero crossing)
this was my starting point:
.-------------+---->|--[R]-. | | | | |\ | |\ | `--|-\ +----|-\ | |\ | >--->|--+ | >----+-| >O-- out in---+--|+/ | .-|+/ |/ | |/ === | |/ -+- | | | | | -+- +5 /// | [1K] | |\| +-----' `--|-\ |/ | >---[1k]-| .--|+/ |>
| |/| | | -+- -5 /// gnd ///
this circuit has max output duty cycle of 50% only measures the amplitide of the positive half-cycle and is only approximately linear (but R could be replaced with a better current source) if I can find some ideal op-amps and comparitors and install a flip-flop (or delay line?) to squash the glitch it might even work!
Many of the op-amps have diodes across the inputs.
The real parts are HC4053s. I have an only partial model of them. The supply voltages are +/- 5V so that the switches can be used.
There is a trick to doing the op-amp and diode rectifiers. You want to keep the op-amp from flying to the rails on the other half cycle. In real life, op-amps tend to take a long time to recover from being crashed against the rails.
-- So it doesn't really work?
On 2008-12-15, John Fields wrote:
that's right...
It's more parts than the above ascii but it seems to work.
Version 4 SHEET 1 1176 680 WIRE -336 -272 -352 -272 WIRE -320 -272 -336 -272 WIRE 416 -272 240 -272 WIRE 576 -272 480 -272 WIRE 720 -272 656 -272 WIRE -336 -256 -336 -272 WIRE -240 -256 -288 -256 WIRE 112 -192 -128 -192 WIRE 128 -192 112 -192 WIRE 144 -192 128 -192 WIRE 272 -192 208 -192 WIRE 400 -192 272 -192 WIRE 656 -192 640 -192 WIRE 720 -192 720 -272 WIRE -336 -176 -368 -176 WIRE -288 -176 -288 -256 WIRE -288 -176 -336 -176 WIRE -368 -160 -368 -176 WIRE -240 -160 -240 -176 WIRE -240 -160 -256 -160 WIRE -224 -160 -240 -160 WIRE 16 -160 -16 -160 WIRE 112 -160 112 -192 WIRE 112 -160 80 -160 WIRE 112 -128 112 -160 WIRE -176 -112 -304 -112 WIRE -80 -112 -80 -160 WIRE 336 -112 320 -112 WIRE 352 -112 336 -112 WIRE 576 -112 576 -192 WIRE 592 -112 576 -112 WIRE 720 -112 720 -192 WIRE 992 -112 896 -112 WIRE 336 -96 336 -112 WIRE 272 -80 272 -192 WIRE 304 -80 272 -80 WIRE -240 -64 -256 -64 WIRE -224 -64 -240 -64 WIRE -64 -64 -80 -64 WIRE -48 -64 -64 -64 WIRE 400 -64 400 -192 WIRE 400 -64 368 -64 WIRE 448 -64 400 -64 WIRE 576 -64 576 -112 WIRE 576 -64 528 -64 WIRE 624 -64 608 -64 WIRE 640 -64 624 -64 WIRE 896 -64 896 -112 WIRE 992 -64 992 -112 WIRE -240 -48 -240 -64 WIRE -64 -48 -64 -64 WIRE 240 -48 240 -272 WIRE 304 -48 240 -48 WIRE 624 -48 624 -64 WIRE -304 -32 -304 -112 WIRE -272 -32 -304 -32 WIRE -128 -32 -128 -192 WIRE -96 -32 -128 -32 WIRE 576 -32 576 -64 WIRE 592 -32 576 -32 WIRE -176 -16 -176 -112 WIRE -176 -16 -208 -16 WIRE -144 -16 -176 -16 WIRE -16 -16 -16 -112 WIRE -16 -16 -32 -16 WIRE 48 -16 -16 -16 WIRE 112 -16 112 -48 WIRE 336 -16 336 -32 WIRE 336 -16 320 -16 WIRE 352 -16 336 -16 WIRE 720 -16 720 -112 WIRE 720 -16 656 -16 WIRE 832 -16 800 -16 WIRE -352 0 -512 0 WIRE -272 0 -352 0 WIRE -144 0 -144 -16 WIRE -96 0 -144 0 WIRE 592 0 576 0 WIRE 448 16 416 16 WIRE 576 16 576 0 WIRE 576 16 528 16 WIRE -512 32 -512 0 WIRE -240 32 -240 16 WIRE -240 32 -256 32 WIRE -224 32 -240 32 WIRE -64 32 -64 16 WIRE -64 32 -80 32 WIRE -48 32 -64 32 WIRE 240 64 240 -48 WIRE 272 64 240 64 WIRE 896 64 896 32 WIRE 1040 64 896 64 WIRE -16 80 -16 -16 WIRE 0 80 -16 80 WIRE 80 80 64 80 WIRE 240 80 240 64 WIRE 240 80 160 80 WIRE 896 80 896 64 WIRE -352 96 -352 0 WIRE 240 96 240 80 WIRE 624 112 624 16 WIRE 768 112 624 112 WIRE 624 144 624 112 WIRE 624 144 608 144 WIRE 640 144 624 144 WIRE -512 160 -512 112 WIRE 240 192 240 160 WIRE 544 192 528 192 WIRE 560 192 544 192 WIRE 768 192 768 112 WIRE 896 192 896 160 WIRE 896 192 768 192 WIRE -352 208 -352 176 WIRE -96 208 -352 208 WIRE -16 208 -32 208 WIRE 0 208 -16 208 WIRE 416 208 416 16 WIRE 416 208 400 208 WIRE 448 208 416 208 WIRE 544 208 544 192 WIRE 544 208 528 208 WIRE -16 224 -16 208 WIRE 400 224 400 208 WIRE -96 240 -96 208 WIRE -48 240 -96 240 WIRE 64 256 64 240 WIRE 64 256 16 256 WIRE 416 256 416 208 WIRE 640 256 416 256 WIRE -160 272 -208 272 WIRE -64 272 -80 272 WIRE -48 272 -64 272 WIRE 64 272 64 256 WIRE 96 272 64 272 WIRE 336 272 176 272 WIRE 640 272 640 256 WIRE -208 304 -208 272 WIRE -16 304 -16 288 WIRE -16 304 -32 304 WIRE 0 304 -16 304 WIRE -64 384 -64 272 WIRE -48 384 -64 384 WIRE 64 384 64 272 WIRE 64 384 32 384 WIRE 400 384 400 320 WIRE 640 496 640 464 FLAG -64 -64 vcc FLAG 624 -64 vcc FLAG -512 160 0 FLAG -336 -272 vcc FLAG -368 -160 0 FLAG -240 -160 vee FLAG -64 32 vee FLAG 624 144 vee FLAG 240 192 0 FLAG -16 208 vcc FLAG -16 304 vee FLAG -208 304 0 FLAG 400 384 0 FLAG 544 192 vcc FLAG -240 -64 vcc FLAG -240 32 vee FLAG 640 496 0 FLAG 336 -112 vcc FLAG 336 -16 vee FLAG 272 64 cap FLAG 992 -64 0 FLAG 1040 64 out SYMBOL Opamps\\LT1097 -64 -80 R0 SYMATTR InstName U1 SYMBOL Opamps\\LT1097 624 -80 R0 SYMATTR InstName U2 SYMBOL Misc\\battery -240 -272 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 5v SYMBOL voltage -512 16 R0 WINDOW 3 -189 100 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value SINE(0 .2 2000) SYMATTR InstName V2 SYMBOL Misc\\battery -336 -272 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 5v SYMBOL cap 224 96 R0 SYMATTR InstName C2 SYMATTR Value 1µf SYMBOL diode 48 0 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName D1 SYMATTR Value 1N914 SYMBOL Opamps\\LT1097 -16 192 R0 SYMATTR InstName U3 SYMBOL res -368 80 R0 SYMATTR InstName R2 SYMATTR Value 100k SYMBOL diode 416 -256 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName D2 SYMATTR Value 1N914 SYMBOL res 672 -288 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R3 SYMATTR Value 1K SYMBOL res -64 256 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R4 SYMATTR Value 100 SYMBOL res 48 368 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R5 SYMATTR Value 100meg SYMBOL npn 336 224 R0 WINDOW 3 56 60 Left 0 SYMATTR Value 2N2222 SYMATTR InstName Q1 SYMBOL res 544 192 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R6 SYMATTR Value 1K SYMBOL res 816 -32 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R7 SYMATTR Value 1k SYMBOL Opamps\\LT1097 -240 -80 R0 SYMATTR InstName U4 SYMBOL res 176 64 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 51 49 VBottom 0 SYMATTR InstName R10 SYMATTR Value 100 SYMBOL res 192 256 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 28 56 VBottom 0 SYMATTR InstName R12 SYMATTR Value 1k SYMBOL diode 624 400 R0 SYMATTR InstName D3 SYMBOL diode 624 336 R0 SYMATTR InstName D4 SYMBOL res 544 0 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R14 SYMATTR Value 1K SYMBOL Opamps\\LT1097 336 -128 R0 SYMATTR InstName U5 SYMBOL res 544 -80 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R11 SYMATTR Value 1K SYMBOL res 96 -144 R0 SYMATTR InstName R9 SYMATTR Value 10k SYMBOL diode 0 96 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName D5 SYMATTR Value 1N914 SYMBOL res 224 -208 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R16 SYMATTR Value 1k SYMBOL diode -80 -96 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName D6 SYMATTR Value 1N914 SYMBOL diode 80 -176 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName D7 SYMATTR Value 1N914 SYMBOL diode -16 -176 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName D10 SYMATTR Value 1N914 SYMBOL diode 720 -128 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName D11 SYMATTR Value 1N914 SYMBOL res 736 -208 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R19 SYMATTR Value 47K SYMBOL diode 576 -176 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName D8 SYMATTR Value 1N914 SYMBOL diode 656 -128 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName D9 SYMATTR Value 1N914 SYMBOL diode 624 272 R0 SYMATTR InstName D12 SYMBOL pnp 832 32 M180 SYMATTR InstName Q3 SYMATTR Value 2N2907 SYMBOL res 880 64 R0 SYMATTR InstName R8 SYMATTR Value 1k TEXT -568 392 Left 0 !.tran 0 .006s .001s startup
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.