Field-Programmable Gate Arrays

Call for Papers (CFP)

========================================================= ARPN Journal of Science and Technology Call for Papers (Vol....

0 comments posted 14yrs

posted by managing.editor.arpn

0 comments posted 14yrs posted by managing.editor.arpn

ASIC design job vs FPGA design job

Hi folks, I am an ASIC design engineer with over 6 years experience. My experience in ASIC design spans across microarc...

14 comments posted 14yrs

posted by pinaki_m77

14 comments posted 14yrs posted by pinaki_m77

Choose between Cyclone II and Spartan II

Hi All, I am starting a new project for a software defined radio using FPGA. I plan to use simulink and HDL coder with...

2 comments posted 14yrs

posted by everteq

2 comments posted 14yrs posted by everteq

PCI Express development board

Hi, I'm looking for an FPGA-based PCI Express development board which is capable of transmitting data at about 1.4 GByt...

19 comments posted 14yrs

posted by zsolt.garamvolgyi

19 comments posted 14yrs posted by zsolt.garamvolgyi

Xilinx USB II Cable driver under Gentoo Linux

I'm looking for pointers to an installation guide on how to install the Xilinx USB II Cable driver under Gentoo Linux?...

4 comments posted 14yrs

posted by newsmailcomp6

4 comments posted 14yrs posted by newsmailcomp6

draw lines, circles, squares on FPGA by mouse and display on VGA ( not use NIOS)

hi ! im from vietnam . my english is not good , i hope you can understand what i say . thanks ! i have project to gradu...

17 comments posted 14yrs

posted by lexuancong252

17 comments posted 14yrs posted by lexuancong252

[ANN] Free web access to the HercuLeS high-level synthesis tool

Dear all i'm pleased to announce that free access to the web interface of the HercuLeS high-level synthesis tool is now...

0 comments posted 14yrs

posted by nikolaos.kavvadias

0 comments posted 14yrs posted by nikolaos.kavvadias

Patent Reform Town Hall Meeting (Balt/Washington Area IEEE Consultants Network)

Co-sponsored by IEEE NCA Consultants Network, Baltimore Consultants Network, Society on Social Implications of Technolo...

0 comments posted 14yrs

posted by gnuarm

0 comments posted 14yrs posted by gnuarm

CSV pinout from Actel

Guys, Do you know if it is possible to get a complete pinout report from the Actel compilation flow? I want something c...

1 comments posted 14yrs

posted by padudle

1 comments posted 14yrs posted by padudle

Clock Phase Fun on Cyclone III

I've got a project going on a Cyclone III, and have hit an issue that seems like it has a simple solution if only I alr...

1 comments posted 14yrs

posted by rgaddi

1 comments posted 14yrs posted by rgaddi

Modelsim on windoz save settings in a file rather than registry

Hi Is there any way of getting modelsim not to use the widoz registry for settings. I would prefer if it would use my ....

2 comments posted 14yrs

posted by dgreig

2 comments posted 14yrs posted by dgreig

newable need help

hi all. im currently learning FPGAs and having big interesting in it. but the only place i can practice is the uni lab....

1 comments posted 14yrs

posted by jayloveben

1 comments posted 14yrs posted by jayloveben

FPGA functional flow..please help!

Hallo, I am new in the world of FPGA. I am asked to design he functional flow for a image processing hardware. The hard...

2 comments posted 14yrs

posted by vibha.rao19

2 comments posted 14yrs posted by vibha.rao19

Reference books on microprocessor design with VHDL

Hello, i follow the book Microprocessor design with VHDL by Enoch O.Hwang. I want some reference books and some web addr...

1 comments posted 14yrs

posted by jvkphysics

1 comments posted 14yrs posted by jvkphysics

ADC by using counter method on FPGA using VHDL language

Hello,i have some idea about vhdl.I want coding of ADC by using counter method on FPGA by using VHDL.. I know the some...

2 comments posted 14yrs

posted by jvkphysics

2 comments posted 14yrs posted by jvkphysics