Latest threads in Field-Programmable Gate Arrays

Looking for a decent FPGA board with multiple Xilinx Virtex 5 FPGAs

Hi, I am looking for a decent PCIe (Gen1 & Gen2) based FPGA board with preferably 2 Xilinx Virtex 5 FPGAs on it. A 2GB...

1 14yrs

sheikh.m.farhan

1 14yrs sheikh.m.farhan

Enterpoint New Boards

We have some new, and some not so new, offerings this week. The first out is a new member of the Merrick family. Merric...

3 14yrs

g1

3 14yrs g1

Call for Papers (CFP)

========================================================= ARPN Journal of Science and Technology Call for Papers (Vol....

0 14yrs

managing.editor.arpn

0 14yrs managing.editor.arpn

ASIC design job vs FPGA design job

Hi folks, I am an ASIC design engineer with over 6 years experience. My experience in ASIC design spans across microarc...

14 14yrs

pinaki_m77

14 14yrs pinaki_m77

Choose between Cyclone II and Spartan II

Hi All, I am starting a new project for a software defined radio using FPGA. I plan to use simulink and HDL coder with...

2 15yrs

everteq

2 15yrs everteq

PCI Express development board

Hi, I'm looking for an FPGA-based PCI Express development board which is capable of transmitting data at about 1.4 GByt...

19 15yrs

zsolt.garamvolgyi

19 15yrs zsolt.garamvolgyi

Xilinx USB II Cable driver under Gentoo Linux

I'm looking for pointers to an installation guide on how to install the Xilinx USB II Cable driver under Gentoo Linux?...

4 15yrs

newsmailcomp6

4 15yrs newsmailcomp6

draw lines, circles, squares on FPGA by mouse and display on VGA ( not use NIOS)

hi ! im from vietnam . my english is not good , i hope you can understand what i say . thanks ! i have project to gradu...

17 15yrs

lexuancong252

17 15yrs lexuancong252

[ANN] Free web access to the HercuLeS high-level synthesis tool

Dear all i'm pleased to announce that free access to the web interface of the HercuLeS high-level synthesis tool is now...

0 15yrs

nikolaos.kavvadias

0 15yrs nikolaos.kavvadias

Patent Reform Town Hall Meeting (Balt/Washington Area IEEE Consultants Network)

Co-sponsored by IEEE NCA Consultants Network, Baltimore Consultants Network, Society on Social Implications of Technolo...

0 15yrs

gnuarm

0 15yrs gnuarm

CSV pinout from Actel

Guys, Do you know if it is possible to get a complete pinout report from the Actel compilation flow? I want something c...

1 15yrs

padudle

1 15yrs padudle

Clock Phase Fun on Cyclone III

I've got a project going on a Cyclone III, and have hit an issue that seems like it has a simple solution if only I alr...

1 15yrs

rgaddi

1 15yrs rgaddi

Modelsim on windoz save settings in a file rather than registry

Hi Is there any way of getting modelsim not to use the widoz registry for settings. I would prefer if it would use my ....

2 15yrs

dgreig

2 15yrs dgreig

newable need help

hi all. im currently learning FPGAs and having big interesting in it. but the only place i can practice is the uni lab....

1 15yrs

jayloveben

1 15yrs jayloveben

FPGA functional flow..please help!

Hallo, I am new in the world of FPGA. I am asked to design he functional flow for a image processing hardware. The hard...

2 15yrs

vibha.rao19

2 15yrs vibha.rao19

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