Field-Programmable Gate Arrays

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Need help on clock forwarding on Xilinx Virtex-5

Hi, I'm new to FPGA world and currently working on an emulation board with 2 Virtex-5. I think to forward clock from ch...
0 comments posted 19yrs
posted by ggkuo
0 comments posted 19yrs posted by ggkuo

help on clock fowarding between 2 FPGAs

Hi, I'm new to FPGA world and currently working on an emulation board with 2 Virtex-5. I think to forward clock from ch...
5 comments posted 19yrs
posted by ggkuo
5 comments posted 19yrs posted by ggkuo

edk clock problem

Dear all, I am a graduate student at USF. I am working with XILINX XUPV2P board and i am using edk to interface memory...
0 comments posted 19yrs
posted by mahalingamv
0 comments posted 19yrs posted by mahalingamv

Quartus Timing Analyzer question

Hi. I am working with Alera Quartus software on FPGA realization of STFT(Short Time Fourier Transform) and I have one p...
5 comments posted 19yrs
posted by Zorjak
5 comments posted 19yrs posted by Zorjak

Using LogicLock in Altera Quartus II

Hello, I'm looking for opinions on using LogicLock in Quartus II, is it useful or a waste of time? What are some of your...
2 comments posted 19yrs
posted by jjlindula
2 comments posted 19yrs posted by jjlindula

problems with FSL and Microblaze

I=B4m developing a FSL Peripheral. I=B4m having the following problem: when trying to generate the bitstream it generat...
4 comments posted 19yrs
posted by dmendesf
4 comments posted 19yrs posted by dmendesf

c code to initialize a peripheral

Hi everybody I am trying to familiar to xps software .So i am trying to create a peripheral using 2kb bram block in whi...
5 comments posted 19yrs
posted by rajivc53
5 comments posted 19yrs posted by rajivc53

LogicSim v3.0 Verilog Simulator is Here!

LogicSim v3.0, an affordable and user-friendly Verilog simulator for ASIC and FPGA design verification is finally here....
0 comments posted 19yrs
posted by ngsayjoe
0 comments posted 19yrs posted by ngsayjoe

ISE write permissions?

9.1 SP3 on XP. I can open my project from the "File" dialog, but if I try double-clicking the ISE file I get: "The proj...
3 comments posted 19yrs
posted by pfraser
3 comments posted 19yrs posted by pfraser

custom peripheral registers

Hi everybody, i' trying to realize a custom OPB peripheral using EDK. In my design I need a register in which one bit s...
5 comments posted 19yrs
posted by cispa
5 comments posted 19yrs posted by cispa