Field-Programmable Gate Arrays

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MicroBlaze and ChipScope

Hi, I want use ChipScope with MicroBlaze but I can't find tutorial or etc. I use EDK 8.1 and ChipScope 8.1. Any body has...
1 comments posted 18yrs
posted by icegray
1 comments posted 18yrs posted by icegray

Spartan-3A DSP vs. Cyclone III Power-wise

Hi, Well the subject says it all. Just wondering how does Spartan-3A DSP compares to Cyclone III in terms of power effi...
7 comments posted 18yrs
posted by mloulah
7 comments posted 18yrs posted by mloulah

FPL 2007 : Final call for participation

We are pleased to invite you to participate in the 2007 Field Programmable Logic Conference which will be held in Amste...
0 comments posted 18yrs
posted by m8pple
0 comments posted 18yrs posted by m8pple

Old issues of XCell magazine

Somebody asked for access to old XCell magazines. I was able to download all issues #17 through #39 ( 2Q1995 through 1Q...
2 comments posted 18yrs
posted by peter
2 comments posted 18yrs posted by peter

exe file in modelsim

Hi all, Can anyone suggest me how to run an exe file in modelsim...I have tried using sccom -g basedes.cpp baseDesc.cpp...
1 comments posted 18yrs
posted by fazulu.vlsi
1 comments posted 18yrs posted by fazulu.vlsi

Multiple MicroBlazes error

Hi all, I am currently work on multiple Microblazes too. I met this error message when instantiion....
1 comments posted 18yrs
posted by zhang.young
1 comments posted 18yrs posted by zhang.young

Voltage translation question

I need to do the voltage translation from V5 3.3V push-pull output to one of the traget device input. The input accepts...
14 comments posted 18yrs
posted by
14 comments posted 18yrs posted by

GPIO_performance

Has any one measured the cycles needed for a single I/O function using a GPIO peripheral with the PowerPC processor (Vi...
2 comments posted 18yrs
posted by
2 comments posted 18yrs posted by

MCS -> BIT

Hello I have just the MCS file and I want to configure directly my FPGa with a bitstream. So I had to convert the MCS i...
4 comments posted 18yrs
posted by lpaulo07
4 comments posted 18yrs posted by lpaulo07

Globally Asynchronous in FPGA

Hello Let me ask one question. >From my small experience, I find that FPGA is good for synchronous design, because (1)...
6 comments posted 18yrs
posted by pasacco
6 comments posted 18yrs posted by pasacco

Xilinx / ISE multi-cycle path constraint pitfall

Hello, To summarize the issue briefly: I have a group of flip-flops which toggle every 4 clocks by using an "clock enab...
26 comments posted 18yrs
posted by eli.billauer
26 comments posted 18yrs posted by eli.billauer

DDR controller - best device to perform

Hello I decided to make my own DDR controller. I want to do this on CycloneII or Spartan-3 I'm not decided yet. That's...
16 comments posted 18yrs
posted by "SwietyMikolaj["
16 comments posted 18yrs posted by "SwietyMikolaj["