Which chip should I use?

5V tolerant and cheap are mutual exclusive. You can use series resistors to make the input 5V tolerant or use some "Quick Switches" in series. Regards Thomas

Xilinx Spartan 2 for all but the last requirement. The last two requirements are mutually exclusive.

Well, it is undoubtedly true if we consider all modern devices, but here the chip can be a little outdated -- it will work as an IDE interface (UltraDMA 133, two channels) and perform some auxilary tasks. The power consumption is not very important. Does it help?

Not at this speed, I think. A column of some LVX translators (74LVX245, for example) would be much better, but the board sould be as small as possible, so I don't want this approach.

Hm, what are they?

Best regards Piotr Wyderski

Have a look at

the "Quick Switches" were invented by "Quality Semiconductor". There should be an App Note how to use them as bus translator.

Maybe a CPLD instead of an fpga may be a better choice in your case.

Regards, Thomas

Thanks, they look nice. :-)

Hm, I don't think so, large (512+ cells) CPLDs are very expensive. But an ACEX FPGA seems to be a reasonable candidate (250MHz,

5V-tolerant, available in the TQFP100 and TQFP144 packages and they have more than enough cells). FLEX6K are good too.

Best regards Piotr Wyderski

Piotr,

A s> Hello,

frequency;

Hi Piotr,

If you are willing to use resistors/translator on inputs, you can also consider Altera's Max II family (specifically the EPM1270 in this case). You've stated a "133 Mhz" operation requirement, but the speed of operation is a combination of what your design is doing and the speed of the device. I'm sure you know this, but even though an ACEX can be clocked at 250 Mhz doesn't mean all designs will run that fast. The EPM1270 gives you 1270

4-input logic elements, integrated configuration memory, and very high operating speeds.

Good luck,

Paul Leventis Altera Corp.

Well, 2 IDE channels require ~64 buffered IO lines and it means 8 additional LVX245 chips, what makes the board considerably larger and increases the cost by about 2$ (low cost is a priority in this design). Resistors would be good, because they are small and cheap, but I don't believe that they will perform their job well at this speed.

Of course, but here the design can be easily pipelined, so the chip doesn't have to be extremely fast just to compensate a wrong algorithm.

But it cannot work with 5V devices. :-(

Best regards Piotr Wyderski

...

Piotr,

check out the SN74TVC3010 from TI. It's a 10 channel voltage level converter. We use them to interface 5 Vdevices to 3.3V FPGAs. Works like a charm, and 133 MHz should be no sweat either ...

DigiKey lists them for about $1.10 each (qtty 25)

Best Regards, rudi ============================================================= Rudolf Usselmann, ASICS World Services,

Your Partner for IP Cores, Design, Verification and Synthesis

Thanks for this information, but these chips are very expensive (relatively to their capabilities) -- LVC245 will do this task as well, but its cost is 0.33$ (one unit quantity) or 0.25$ (25 units).

Best regards Piotr Wyderski

In one of our product where we required a 5.0V tolerant I/O, we actually used SN74CB3T16211DL ($2.09/1K)from TI. Those are 24bit bus switch with 5V tolerant level shifter. Just use them as "pass throught". It is PCI compatible (33mhz) but im not too sure for Ultra ATA 133. You get 24bit in a single package and u will need 3 of them in order to cover your 64bit bus. Still you save on board space plus least routing for your pcb. Right now, digikey sells them for $2.38/unit.

Good luck Jacques

Check the Actel A54SX-S Device. Every requirement above could be met by a 54SX-S, if you accept a wide range for relative cheap *veg*.

133 MHz need a good design job, but I've allready seen 140MHz (MIL-Conditions) in real design .

bye Thomas

I guess it all depends on your needs. If the 245 will do the trick than great ! If you need bidirectional signaling, than the 3010 might be a better option. The 3010 is more closer to a Quick-Switch architecture, the 245 is a buffer. I believe the 3010 does not add any delay (except for a tiny RC).

Good Luck !

rudi ============================================================= Rudolf Usselmann, ASICS World Services,

Your Partner for IP Cores, Design, Verification and Synthesis

Yes, but to replace 500 - 1000 LUTs you do not need 512+ cells. You can usually get along with about the number of cells as the design has flip-flops, and most designs that I see use less flip-flops than LUTs.

Kolja Sulimma

Yes, in this case 245 cannot be applied, thay are pseudobidirectional and coarse-grained (i.e. the direction of all 8 signals must be identical). But in my project it's not the problem. BTW, my local distributor sells much more powerful 1C3 speed grade 8 Cyclones considerably cheaper than 1K30 ACEXes; even with 8xLVC245 the price is still lower. Strange, but Cyclone is the winner, so I'll use it in my cost-sensitive project. :-)

Best regards Piotr Wyderski

And another thing I forgot to mention: an Atmel

2313 + AT45DB011B-SI 1MBit serial DataFlash is over 2 times cheaper than the EPC1 configuration memory -- why are Altera's config devices so expensive?

Best regards Piotr Wyderski

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