what are the semantics of yosys $alu and $macc cells?

Feb 29, 2016 1 Replies

I'd like to know if I can implement them with single bit full adders and single bit mult cells only, or if I need additional primitives.



(trying to guess the semantics from the logic ops in their simulation modules just makes my head hurt)


and what's those $lcu things (in techmap.v)

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