I am new to CPLD's and I am trying to make a new design incorporating some of the old abel code. I am using schematic entry (XC9572). I have converted the abel code into symbols and incorporating them to my schematic. In the new design I am not using many of the input and outputs that were defined in the abel code but I dont want to fiddle with that and so I am using the code as it is.
Now when I synthesize I get following warnings..
WARNING:Xst:647 - Input is never used.
WARNING:Xst:646 - Signal is assigned but never used.
WARNING:Xst:2170 - Unit PN67c : the following signal(s) form a combinatorial loop: _xor0004, BEL, _xor0002
WARNING:Xst:1354 - Port SPAREI is not connected, attached property removed (LOC)
Should I worry about these warnings because I am not using all these ports/signals/input?
At present I have connected all unused inputs to ground and left the unused outputs as it is. Is that the right approach?
Thanks for any responses...