vhdl cpu emulator (any interest?)

During the design of my latest FPGA, I wrote a vhdl cpu emulator. I would like to know if there is interest in the (open source) FPGA community for such a vhdl cpu emulator?

The emulator supports: reading and writing from / to memory on the FPGA waiting for interrupts or set periods of time multiple threads cpu global registers thread local registers setting local registers based on thread arguments when spawning one level while loop one level of if with else statement outputting data read during a read to a file

CPU commands come from a main file, and each thread has its own separate file.

If there is already something like this out there, I would love to hear about it.

Thanx, nachum

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So i assume this would be somewhat generic, so any CPU could be emulated?

Sounds interesting to me at least.

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Try comp.lang.vhdl

-- Mike Treseler

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Mike Treseler

comp.lang.vhdl is the correct group.

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should be willing to host it.

Sounds useful to me; I'd like to see it.

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